[PATCH] D103167: [ARM] Fix Machine Outliner LDRD/STRD handling in Thumb mode

[Yvan Roux via Phabricator via llvm-commits]

yroux created this revision.
yroux added reviewers: samparker, efriedma, paquette.
Herald added subscribers: danielkiss, dmgreen, hiraditya, kristof.beyls.
yroux requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This is a fix for PR50481

Immediate values for AddrModeT2_i8s4 are already scaled in MCinst operand, change the number of bits
and scale factor to reflect that state when checking stack offset status.  AddrModeT2_i7s[2|4] also have
this particularity but since MVE instructions are outlined, just move these cases to the unhandled ones.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D103167

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
  llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir


Index: llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
===================================================================
--- llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
+++ llvm/test/CodeGen/ARM/machine-outliner-stack-fixup-thumb.mir
@@ -81,23 +81,23 @@
     ;CHECK-LABEL: name:           CheckAddrModeT2_i8s4
     ;CHECK: $r0 = tMOVr $r1, 14 /* CC::al */, $noreg
     ;CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @OUTLINED_FUNCTION_[[I8S4:[0-9]+]]
-    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 254, 14 /* CC::al */, $noreg
+    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 1020, 14 /* CC::al */, $noreg
     $r0 = tMOVr $r1, 14, $noreg
     tBL 14, $noreg, @foo, implicit-def dead $lr, implicit $sp
     t2STRDi8 $r0, $r1, $sp, 0, 14, $noreg
     t2STRDi8 $r0, $r1, $sp, 8, 14, $noreg
-    t2STRDi8 $r0, $r1, $sp, 253, 14, $noreg
-    t2STRDi8 $r0, $r1, $sp, 254, 14, $noreg
+    t2STRDi8 $r0, $r1, $sp, 1012, 14, $noreg
+    t2STRDi8 $r0, $r1, $sp, 1020, 14, $noreg
     tBL 14, $noreg, @foo, implicit-def dead $lr, implicit $sp
     t2STRDi8 $r0, $r1, $sp, 0, 14, $noreg
     t2STRDi8 $r0, $r1, $sp, 8, 14, $noreg
-    t2STRDi8 $r0, $r1, $sp, 253, 14, $noreg
-    t2STRDi8 $r0, $r1, $sp, 254, 14, $noreg
+    t2STRDi8 $r0, $r1, $sp, 1012, 14, $noreg
+    t2STRDi8 $r0, $r1, $sp, 1020, 14, $noreg
     tBL 14, $noreg, @foo, implicit-def dead $lr, implicit $sp
     t2STRDi8 $r0, $r1, $sp, 0, 14, $noreg
     t2STRDi8 $r0, $r1, $sp, 8, 14, $noreg
-    t2STRDi8 $r0, $r1, $sp, 253, 14, $noreg
-    t2STRDi8 $r0, $r1, $sp, 254, 14, $noreg
+    t2STRDi8 $r0, $r1, $sp, 1012, 14, $noreg
+    t2STRDi8 $r0, $r1, $sp, 1020, 14, $noreg
     BX_RET 14, $noreg
 ...
 ---
@@ -205,9 +205,9 @@
     ;CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 8
     ;CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $lr, -8
     ;CHECK-NEXT: tBL 14 /* CC::al */, $noreg, @foo, implicit-def dead $lr, implicit $sp
-    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 2, 14 /* CC::al */, $noreg
-    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 10, 14 /* CC::al */, $noreg
-    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 255, 14 /* CC::al */, $noreg
+    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 8, 14 /* CC::al */, $noreg
+    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 16, 14 /* CC::al */, $noreg
+    ;CHECK-NEXT: t2STRDi8 $r0, $r1, $sp, 1020, 14 /* CC::al */, $noreg
     ;CHECK-NEXT: $lr, $sp = t2LDR_POST $sp, 8, 14 /* CC::al */, $noreg
 
     ;CHECK: name:           OUTLINED_FUNCTION_[[I12]]
Index: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -5936,6 +5936,9 @@
       || AddrMode == ARMII::AddrModeT2_so // SP can't be used as based register
       || AddrMode == ARMII::AddrModeT2_pc // PCrel access
       || AddrMode == ARMII::AddrMode2     // Used by PRE and POST indexed LD/ST
+      || AddrMode == ARMII::AddrModeT2_i7   // v8.1-M MVE
+      || AddrMode == ARMII::AddrModeT2_i7s2 // v8.1-M MVE
+      || AddrMode == ARMII::AddrModeT2_i7s4 // v8.1-M sys regs VLDR/VSTR
       || AddrMode == ARMII::AddrModeNone)
     return false;
 
@@ -5978,6 +5981,10 @@
     NumBits = 8;
     break;
   case ARMII::AddrModeT2_i8s4:
+    // FIXME: Values are already scaled in this addressing mode.
+    NumBits = 10;
+    Scale = 1;
+    break;
   case ARMII::AddrModeT2_ldrex:
     NumBits = 8;
     Scale = 4;
@@ -5986,17 +5993,6 @@
   case ARMII::AddrMode_i12:
     NumBits = 12;
     break;
-  case ARMII::AddrModeT2_i7:
-    NumBits = 7;
-    break;
-  case ARMII::AddrModeT2_i7s2:
-    NumBits = 7;
-    Scale = 2;
-    break;
-  case ARMII::AddrModeT2_i7s4:
-    NumBits = 7;
-    Scale = 4;
-    break;
   case ARMII::AddrModeT1_s: // SP-relative LD/ST
     NumBits = 8;
     Scale = 4;


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