[llvm] ad90a6b - [OpaquePtr] Create new bitcode encoding for atomicrmw
Arthur Eubanks via llvm-commits
llvm-commits at lists.llvm.org
Tue May 25 16:30:56 PDT 2021
Author: Arthur Eubanks
Date: 2021-05-25T16:30:34-07:00
New Revision: ad90a6be219a547873beb80f977e45e23e9247ac
URL: https://github.com/llvm/llvm-project/commit/ad90a6be219a547873beb80f977e45e23e9247ac
DIFF: https://github.com/llvm/llvm-project/commit/ad90a6be219a547873beb80f977e45e23e9247ac.diff
LOG: [OpaquePtr] Create new bitcode encoding for atomicrmw
Since the opaque pointer type won't contain the pointee type, we need to
separately encode the value type for an atomicrmw.
Emit this new code for atomicrmw.
Handle this new code and the old one in the bitcode reader.
Reviewed By: dblaikie
Differential Revision: https://reviews.llvm.org/D103123
Added:
llvm/test/Bitcode/atomicrmw-upgrade.ll
llvm/test/Bitcode/atomicrmw-upgrade.ll.bc
Modified:
llvm/include/llvm/Bitcode/LLVMBitCodes.h
llvm/lib/Bitcode/Reader/BitcodeReader.cpp
llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
Removed:
################################################################################
diff --git a/llvm/include/llvm/Bitcode/LLVMBitCodes.h b/llvm/include/llvm/Bitcode/LLVMBitCodes.h
index 9a23c0cf3f445..da591f4183b08 100644
--- a/llvm/include/llvm/Bitcode/LLVMBitCodes.h
+++ b/llvm/include/llvm/Bitcode/LLVMBitCodes.h
@@ -547,15 +547,15 @@ enum FunctionCodes {
FUNC_CODE_INST_CALL = 34, // CALL: [attr, cc, fnty, fnid, args...]
- FUNC_CODE_DEBUG_LOC = 35, // DEBUG_LOC: [Line,Col,ScopeVal, IAVal]
- FUNC_CODE_INST_FENCE = 36, // FENCE: [ordering, synchscope]
- FUNC_CODE_INST_CMPXCHG_OLD = 37, // CMPXCHG: [ptrty, ptr, cmp, val, vol,
- // ordering, synchscope,
- // failure_ordering?, weak?]
- FUNC_CODE_INST_ATOMICRMW = 38, // ATOMICRMW: [ptrty,ptr,val, operation,
- // align, vol,
- // ordering, synchscope]
- FUNC_CODE_INST_RESUME = 39, // RESUME: [opval]
+ FUNC_CODE_DEBUG_LOC = 35, // DEBUG_LOC: [Line,Col,ScopeVal, IAVal]
+ FUNC_CODE_INST_FENCE = 36, // FENCE: [ordering, synchscope]
+ FUNC_CODE_INST_CMPXCHG_OLD = 37, // CMPXCHG: [ptrty, ptr, cmp, val, vol,
+ // ordering, synchscope,
+ // failure_ordering?, weak?]
+ FUNC_CODE_INST_ATOMICRMW_OLD = 38, // ATOMICRMW: [ptrty,ptr,val, operation,
+ // align, vol,
+ // ordering, synchscope]
+ FUNC_CODE_INST_RESUME = 39, // RESUME: [opval]
FUNC_CODE_INST_LANDINGPAD_OLD =
40, // LANDINGPAD: [ty,val,val,num,id0,val0...]
FUNC_CODE_INST_LOADATOMIC = 41, // LOAD: [opty, op, align, vol,
@@ -582,6 +582,9 @@ enum FunctionCodes {
FUNC_CODE_INST_CALLBR = 57, // CALLBR: [attr, cc, norm, transfs,
// fnty, fnid, args...]
FUNC_CODE_INST_FREEZE = 58, // FREEZE: [opty, opval]
+ FUNC_CODE_INST_ATOMICRMW = 59, // ATOMICRMW: [ptrty, ptr, valty, val,
+ // operation, align, vol,
+ // ordering, synchscope]
};
enum UseListCodes {
diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
index 9d4be53880cb7..ad85066d54766 100644
--- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
+++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp
@@ -5232,8 +5232,10 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
InstructionList.push_back(I);
break;
}
+ case bitc::FUNC_CODE_INST_ATOMICRMW_OLD:
case bitc::FUNC_CODE_INST_ATOMICRMW: {
- // ATOMICRMW:[ptrty, ptr, val, op, vol, ordering, ssid, align?]
+ // ATOMICRMW_OLD: [ptrty, ptr, val, op, vol, ordering, ssid, align?]
+ // ATOMICRMW: [ptrty, ptr, valty, val, op, vol, ordering, ssid, align?]
const size_t NumRecords = Record.size();
unsigned OpNum = 0;
@@ -5245,9 +5247,14 @@ Error BitcodeReader::parseFunctionBody(Function *F) {
return error("Invalid record");
Value *Val = nullptr;
- if (popValue(Record, OpNum, NextValueNo,
- getPointerElementFlatType(FullTy), Val))
- return error("Invalid record");
+ if (BitCode == bitc::FUNC_CODE_INST_ATOMICRMW_OLD) {
+ if (popValue(Record, OpNum, NextValueNo,
+ getPointerElementFlatType(FullTy), Val))
+ return error("Invalid record");
+ } else {
+ if (getValueTypePair(Record, OpNum, NextValueNo, Val))
+ return error("Invalid record");
+ }
if (!(NumRecords == (OpNum + 4) || NumRecords == (OpNum + 5)))
return error("Invalid record");
diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
index fd85b9c527165..bdb973e8e421b 100644
--- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
+++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp
@@ -3103,7 +3103,7 @@ void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
case Instruction::AtomicRMW:
Code = bitc::FUNC_CODE_INST_ATOMICRMW;
pushValueAndType(I.getOperand(0), InstID, Vals); // ptrty + ptr
- pushValue(I.getOperand(1), InstID, Vals); // val.
+ pushValueAndType(I.getOperand(1), InstID, Vals); // valty + val
Vals.push_back(
getEncodedRMWOperation(cast<AtomicRMWInst>(I).getOperation()));
Vals.push_back(cast<AtomicRMWInst>(I).isVolatile());
diff --git a/llvm/test/Bitcode/atomicrmw-upgrade.ll b/llvm/test/Bitcode/atomicrmw-upgrade.ll
new file mode 100644
index 0000000000000..62c6aa7b16cb5
--- /dev/null
+++ b/llvm/test/Bitcode/atomicrmw-upgrade.ll
@@ -0,0 +1,12 @@
+; RUN: llvm-dis < %s.bc | FileCheck %s
+; RUN: verify-uselistorder < %s.bc
+
+; atomicrmw-upgrade.ll.bc was produced by running a version of llvm-as from just
+; before the IR change on this file.
+
+; CHECK: @atomicrmw
+; CHECK: %b = atomicrmw add i32* %a, i32 %i acquire
+define void @atomicrmw(i32* %a, i32 %i) {
+ %b = atomicrmw add i32* %a, i32 %i acquire
+ ret void
+}
diff --git a/llvm/test/Bitcode/atomicrmw-upgrade.ll.bc b/llvm/test/Bitcode/atomicrmw-upgrade.ll.bc
new file mode 100644
index 0000000000000..efbabac217f9c
Binary files /dev/null and b/llvm/test/Bitcode/atomicrmw-upgrade.ll.bc
diff er
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