[llvm] 0cd2629 - [llvm][ARM] Remove non-existent arm1176j-s CPU

David Spickett via llvm-commits llvm-commits at lists.llvm.org
Tue May 25 01:57:00 PDT 2021


Author: David Spickett
Date: 2021-05-25T08:56:55Z
New Revision: 0cd2629d97e70f34adb8d0d2ac4a4d280e3bab86

URL: https://github.com/llvm/llvm-project/commit/0cd2629d97e70f34adb8d0d2ac4a4d280e3bab86
DIFF: https://github.com/llvm/llvm-project/commit/0cd2629d97e70f34adb8d0d2ac4a4d280e3bab86.diff

LOG: [llvm][ARM] Remove non-existent arm1176j-s CPU

This was removed in https://reviews.llvm.org/D52594 for clang.

The one test using it has been updated to use the mpcore
CPU as the linked clang change does.

This is part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D103022

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARM.td
    llvm/test/CodeGen/ARM/build-attributes.ll
    llvm/unittests/Support/TargetParserTest.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td
index 0afcae2939388..5c1bed14c941a 100644
--- a/llvm/lib/Target/ARM/ARM.td
+++ b/llvm/lib/Target/ARM/ARM.td
@@ -1010,7 +1010,6 @@ def : Processor<"cortex-m1",        ARMV6Itineraries,   [ARMv6m,
 def : Processor<"sc000",            ARMV6Itineraries,   [ARMv6m,
                                                          FeatureHasNoBranchPredictor]>;
 
-def : Processor<"arm1176j-s",       ARMV6Itineraries,   [ARMv6kz]>;
 def : Processor<"arm1176jz-s",      ARMV6Itineraries,   [ARMv6kz]>;
 def : Processor<"arm1176jzf-s",     ARMV6Itineraries,   [ARMv6kz,
                                                          FeatureVFP2,

diff  --git a/llvm/test/CodeGen/ARM/build-attributes.ll b/llvm/test/CodeGen/ARM/build-attributes.ll
index c08ff35e85fb3..81391b0b7a4ff 100644
--- a/llvm/test/CodeGen/ARM/build-attributes.ll
+++ b/llvm/test/CodeGen/ARM/build-attributes.ll
@@ -206,10 +206,10 @@
 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
 ; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
 ; ARMv6k
-; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
+; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=mpcore 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
 ; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED
-; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
-; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
+; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
+; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore | FileCheck %s --check-prefix=NO-STRICT-ALIGN
 ; ARMv6m
 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
 ; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN

diff  --git a/llvm/unittests/Support/TargetParserTest.cpp b/llvm/unittests/Support/TargetParserTest.cpp
index 86285dbd49ccf..f89a7f09ae52c 100644
--- a/llvm/unittests/Support/TargetParserTest.cpp
+++ b/llvm/unittests/Support/TargetParserTest.cpp
@@ -549,8 +549,6 @@ TEST(TargetParserTest, testARMExtension) {
                                 ARM::ArchKind::INVALID, "simd"));
   EXPECT_FALSE(testARMExtension("arm1136jf-s",
                                 ARM::ArchKind::INVALID, "crypto"));
-  EXPECT_FALSE(testARMExtension("arm1176j-s",
-                                ARM::ArchKind::INVALID, "crypto"));
   EXPECT_FALSE(testARMExtension("arm1156t2-s",
                                 ARM::ArchKind::INVALID, "crypto"));
   EXPECT_FALSE(testARMExtension("arm1176jzf-s",


        


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