[llvm] e7a268f - [gn build] Port b510e4cf1b96

LLVM GN Syncbot via llvm-commits llvm-commits at lists.llvm.org
Mon May 24 11:52:08 PDT 2021


Author: LLVM GN Syncbot
Date: 2021-05-24T18:48:17Z
New Revision: e7a268f9efc2eff939713a63a1a8524360b32a30

URL: https://github.com/llvm/llvm-project/commit/e7a268f9efc2eff939713a63a1a8524360b32a30
DIFF: https://github.com/llvm/llvm-project/commit/e7a268f9efc2eff939713a63a1a8524360b32a30.diff

LOG: [gn build] Port b510e4cf1b96

Added: 
    

Modified: 
    llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn

Removed: 
    


################################################################################
diff  --git a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
index 366623cb0fad0..08a8855a74ad6 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/RISCV/BUILD.gn
@@ -63,12 +63,12 @@ static_library("LLVMRISCVCodeGen") {
   sources = [
     "RISCVAsmPrinter.cpp",
     "RISCVCallLowering.cpp",
-    "RISCVCleanupVSETVLI.cpp",
     "RISCVExpandAtomicPseudoInsts.cpp",
     "RISCVExpandPseudoInsts.cpp",
     "RISCVFrameLowering.cpp",
     "RISCVISelDAGToDAG.cpp",
     "RISCVISelLowering.cpp",
+    "RISCVInsertVSETVLI.cpp",
     "RISCVInstrInfo.cpp",
     "RISCVInstructionSelector.cpp",
     "RISCVLegalizerInfo.cpp",


        


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