[PATCH] D103022: [llvm][ARM] Remove non-existent arm1176j-s CPU
David Spickett via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 24 06:54:30 PDT 2021
DavidSpickett created this revision.
Herald added subscribers: danielkiss, jdoerfert, hiraditya, kristof.beyls.
DavidSpickett requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.
This was removed in https://reviews.llvm.org/D52594 for clang.
The one test using it has been updated to use the mpcore
CPU as the linked clang change does.
This is part of fixing https://bugs.llvm.org/show_bug.cgi?id=50454.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D103022
Files:
llvm/lib/Target/ARM/ARM.td
llvm/test/CodeGen/ARM/build-attributes.ll
llvm/unittests/Support/TargetParserTest.cpp
Index: llvm/unittests/Support/TargetParserTest.cpp
===================================================================
--- llvm/unittests/Support/TargetParserTest.cpp
+++ llvm/unittests/Support/TargetParserTest.cpp
@@ -549,8 +549,6 @@
ARM::ArchKind::INVALID, "simd"));
EXPECT_FALSE(testARMExtension("arm1136jf-s",
ARM::ArchKind::INVALID, "crypto"));
- EXPECT_FALSE(testARMExtension("arm1176j-s",
- ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("arm1156t2-s",
ARM::ArchKind::INVALID, "crypto"));
EXPECT_FALSE(testARMExtension("arm1176jzf-s",
Index: llvm/test/CodeGen/ARM/build-attributes.ll
===================================================================
--- llvm/test/CodeGen/ARM/build-attributes.ll
+++ llvm/test/CodeGen/ARM/build-attributes.ll
@@ -206,10 +206,10 @@
; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=armv6-none-linux-gnueabi -mcpu=arm1136j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; ARMv6k
-; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=arm1176j-s 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
+; RUN: llc < %s -mtriple=armv6k-none-netbsd-gnueabi -mcpu=mpcore 2> %t | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; RUN: FileCheck %s < %t --allow-empty --check-prefix=CPU-SUPPORTED
-; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
-; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=arm1176j-s | FileCheck %s --check-prefix=NO-STRICT-ALIGN
+; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
+; RUN: llc < %s -mtriple=armv6k-none-linux-gnueabi -mcpu=mpcore | FileCheck %s --check-prefix=NO-STRICT-ALIGN
; ARMv6m
; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mcpu=cortex-m0 -mattr=+strict-align | FileCheck %s --check-prefix=STRICT-ALIGN
; RUN: llc < %s -mtriple=thumb-none-linux-gnueabi -mattr=+strict-align -mcpu=cortex-m0 | FileCheck %s --check-prefix=STRICT-ALIGN
Index: llvm/lib/Target/ARM/ARM.td
===================================================================
--- llvm/lib/Target/ARM/ARM.td
+++ llvm/lib/Target/ARM/ARM.td
@@ -1010,7 +1010,6 @@
def : Processor<"sc000", ARMV6Itineraries, [ARMv6m,
FeatureHasNoBranchPredictor]>;
-def : Processor<"arm1176j-s", ARMV6Itineraries, [ARMv6kz]>;
def : Processor<"arm1176jz-s", ARMV6Itineraries, [ARMv6kz]>;
def : Processor<"arm1176jzf-s", ARMV6Itineraries, [ARMv6kz,
FeatureVFP2,
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