[llvm] 1ad4f88 - [CostModel][X86] Improve accuracy of vector non-uniform shift costs on XOP/AVX2 targets
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon May 24 06:18:31 PDT 2021
Author: Simon Pilgrim
Date: 2021-05-24T14:18:21+01:00
New Revision: 1ad4f887bd7692a9e63fb42586f0ece366f2fe01
URL: https://github.com/llvm/llvm-project/commit/1ad4f887bd7692a9e63fb42586f0ece366f2fe01
DIFF: https://github.com/llvm/llvm-project/commit/1ad4f887bd7692a9e63fb42586f0ece366f2fe01.diff
LOG: [CostModel][X86] Improve accuracy of vector non-uniform shift costs on XOP/AVX2 targets
By llvm-mca analysis, Haswell/Broadwell has a non-uniform vector shift recip-throughput cost of the AVX2 targets at 2 for both 128 and 256-bit vectors - XOP capable targets have better 128-bit vector shifts so improve the fallback in those cases.
Added:
Modified:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/div.ll
llvm/test/Analysis/CostModel/X86/fshl.ll
llvm/test/Analysis/CostModel/X86/fshr.ll
llvm/test/Analysis/CostModel/X86/rem.ll
llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant-inseltpoison.ll
llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index b3a7bd5c15b90..f10f50a2378bf 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -593,6 +593,9 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
static const CostTblEntry AVX512CostTable[] = {
+ { ISD::SHL, MVT::v4i32, 1 },
+ { ISD::SRL, MVT::v4i32, 1 },
+ { ISD::SRA, MVT::v4i32, 1 },
{ ISD::SHL, MVT::v8i32, 1 },
{ ISD::SRL, MVT::v8i32, 1 },
{ ISD::SRA, MVT::v8i32, 1 },
@@ -600,6 +603,8 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
{ ISD::SRL, MVT::v16i32, 1 },
{ ISD::SRA, MVT::v16i32, 1 },
+ { ISD::SHL, MVT::v2i64, 1 },
+ { ISD::SRL, MVT::v2i64, 1 },
{ ISD::SHL, MVT::v4i64, 1 },
{ ISD::SRL, MVT::v4i64, 1 },
{ ISD::SHL, MVT::v8i64, 1 },
@@ -630,16 +635,16 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
return LT.first * Entry->Cost;
static const CostTblEntry AVX2ShiftCostTable[] = {
- // Shifts on v4i64/v8i32 on AVX2 is legal even though we declare to
+ // Shifts on vXi64/vXi32 on AVX2 is legal even though we declare to
// customize them to detect the cases where shift amount is a scalar one.
- { ISD::SHL, MVT::v4i32, 1 },
- { ISD::SRL, MVT::v4i32, 1 },
- { ISD::SRA, MVT::v4i32, 1 },
+ { ISD::SHL, MVT::v4i32, 2 }, // vpsllvd (Haswell from agner.org)
+ { ISD::SRL, MVT::v4i32, 2 }, // vpsrlvd (Haswell from agner.org)
+ { ISD::SRA, MVT::v4i32, 2 }, // vpsravd (Haswell from agner.org)
{ ISD::SHL, MVT::v8i32, 2 }, // vpsllvd (Haswell from agner.org)
{ ISD::SRL, MVT::v8i32, 2 }, // vpsrlvd (Haswell from agner.org)
{ ISD::SRA, MVT::v8i32, 2 }, // vpsravd (Haswell from agner.org)
- { ISD::SHL, MVT::v2i64, 1 },
- { ISD::SRL, MVT::v2i64, 1 },
+ { ISD::SHL, MVT::v2i64, 2 }, // vpsllvq (Haswell from agner.org)
+ { ISD::SRL, MVT::v2i64, 2 }, // vpsrlvq (Haswell from agner.org)
{ ISD::SHL, MVT::v4i64, 2 }, // vpsllvq (Haswell from agner.org)
{ ISD::SRL, MVT::v4i64, 2 }, // vpsrlvq (Haswell from agner.org)
};
@@ -656,8 +661,8 @@ InstructionCost X86TTIImpl::getArithmeticInstrCost(
TargetTransformInfo::OP_None);
}
- // Look for AVX2 lowering tricks.
- if (ST->hasAVX2()) {
+ // Look for AVX2 lowering tricks (XOP is always better at 128-bit shifts).
+ if (ST->hasAVX2() && !(ST->hasXOP() && LT.second.is128BitVector())) {
if (ISD == ISD::SHL && LT.second == MVT::v16i16 &&
(Op2Info == TargetTransformInfo::OK_UniformConstantValue ||
Op2Info == TargetTransformInfo::OK_NonUniformConstantValue))
diff --git a/llvm/test/Analysis/CostModel/X86/div.ll b/llvm/test/Analysis/CostModel/X86/div.ll
index 14f809d0634a3..84304b27b0aa0 100644
--- a/llvm/test/Analysis/CostModel/X86/div.ll
+++ b/llvm/test/Analysis/CostModel/X86/div.ll
@@ -785,11 +785,11 @@ define i32 @sdiv_constpow2() {
;
; AVX2-LABEL: 'sdiv_constpow2'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I64 = sdiv i64 undef, 16
-; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V2i64 = sdiv <2 x i64> undef, <i64 8, i64 16>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V2i64 = sdiv <2 x i64> undef, <i64 8, i64 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 11 for instruction: %V4i64 = sdiv <4 x i64> undef, <i64 2, i64 4, i64 8, i64 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 22 for instruction: %V8i64 = sdiv <8 x i64> undef, <i64 2, i64 4, i64 8, i64 16, i64 32, i64 64, i64 128, i64 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = sdiv i32 undef, 16
-; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V4i32 = sdiv <4 x i32> undef, <i32 2, i32 4, i32 8, i32 16>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4i32 = sdiv <4 x i32> undef, <i32 2, i32 4, i32 8, i32 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V8i32 = sdiv <8 x i32> undef, <i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V16i32 = sdiv <16 x i32> undef, <i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I16 = sdiv i16 undef, 16
@@ -980,11 +980,11 @@ define i32 @udiv_constpow2() {
;
; AVX2-LABEL: 'udiv_constpow2'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = udiv i64 undef, 16
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = udiv <2 x i64> undef, <i64 8, i64 16>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V2i64 = udiv <2 x i64> undef, <i64 8, i64 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i64 = udiv <4 x i64> undef, <i64 2, i64 4, i64 8, i64 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V8i64 = udiv <8 x i64> undef, <i64 2, i64 4, i64 8, i64 16, i64 32, i64 64, i64 128, i64 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = udiv i32 undef, 16
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = udiv <4 x i32> undef, <i32 2, i32 4, i32 8, i32 16>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V4i32 = udiv <4 x i32> undef, <i32 2, i32 4, i32 8, i32 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V8i32 = udiv <8 x i32> undef, <i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V16i32 = udiv <16 x i32> undef, <i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I16 = udiv i16 undef, 16
diff --git a/llvm/test/Analysis/CostModel/X86/fshl.ll b/llvm/test/Analysis/CostModel/X86/fshl.ll
index d7a35257e9b49..a82d676ae6ab8 100644
--- a/llvm/test/Analysis/CostModel/X86/fshl.ll
+++ b/llvm/test/Analysis/CostModel/X86/fshl.ll
@@ -36,7 +36,7 @@ define void @var_funnel_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8 x i64
;
; AVX2-LABEL: 'var_funnel_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I64 = call i64 @llvm.fshl.i64(i64 %a64, i64 %b64, i64 %c64)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V4I64 = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> %a256, <4 x i64> %b256, <4 x i64> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V8I64 = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %a512, <8 x i64> %b512, <8 x i64> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -100,7 +100,7 @@ define void @var_funnel_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16 x i3
;
; AVX2-LABEL: 'var_funnel_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = call i32 @llvm.fshl.i32(i32 %a32, i32 %b32, i32 %c32)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V4I32 = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> %a256, <8 x i32> %b256, <8 x i32> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V8I32 = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %a512, <16 x i32> %b512, <16 x i32> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -692,7 +692,7 @@ define void @constant_funnel_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8
;
; AVX2-LABEL: 'constant_funnel_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I64 = call i64 @llvm.fshl.i64(i64 %a64, i64 %b64, i64 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> <i64 1, i64 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> <i64 1, i64 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4I64 = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> %a256, <4 x i64> %b256, <4 x i64> <i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8I64 = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %a512, <8 x i64> %b512, <8 x i64> <i64 1, i64 7, i64 15, i64 31, i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -756,7 +756,7 @@ define void @constant_funnel_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16
;
; AVX2-LABEL: 'constant_funnel_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = call i32 @llvm.fshl.i32(i32 %a32, i32 %b32, i32 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4I32 = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> %a256, <8 x i32> %b256, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8I32 = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %a512, <16 x i32> %b512, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1240,7 +1240,7 @@ define void @var_rotate_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8 x i64
;
; AVX2-LABEL: 'var_rotate_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.fshl.i64(i64 %a64, i64 %a64, i64 %c64)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I64 = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> %a256, <4 x i64> %a256, <4 x i64> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8I64 = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %a512, <8 x i64> %a512, <8 x i64> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1304,7 +1304,7 @@ define void @var_rotate_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16 x i3
;
; AVX2-LABEL: 'var_rotate_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = call i32 @llvm.fshl.i32(i32 %a32, i32 %a32, i32 %c32)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I32 = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> %a256, <8 x i32> %a256, <8 x i32> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8I32 = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %a512, <16 x i32> %a512, <16 x i32> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1862,7 +1862,7 @@ define void @constant_rotate_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8
;
; AVX2-LABEL: 'constant_rotate_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.fshl.i64(i64 %a64, i64 %a64, i64 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> <i64 1, i64 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I64 = call <2 x i64> @llvm.fshl.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> <i64 1, i64 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4I64 = call <4 x i64> @llvm.fshl.v4i64(<4 x i64> %a256, <4 x i64> %a256, <4 x i64> <i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8I64 = call <8 x i64> @llvm.fshl.v8i64(<8 x i64> %a512, <8 x i64> %a512, <8 x i64> <i64 1, i64 7, i64 15, i64 31, i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1926,7 +1926,7 @@ define void @constant_rotate_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16
;
; AVX2-LABEL: 'constant_rotate_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = call i32 @llvm.fshl.i32(i32 %a32, i32 %a32, i32 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I32 = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4I32 = call <8 x i32> @llvm.fshl.v8i32(<8 x i32> %a256, <8 x i32> %a256, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8I32 = call <16 x i32> @llvm.fshl.v16i32(<16 x i32> %a512, <16 x i32> %a512, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
diff --git a/llvm/test/Analysis/CostModel/X86/fshr.ll b/llvm/test/Analysis/CostModel/X86/fshr.ll
index 42156f093916b..3e838ba36eaca 100644
--- a/llvm/test/Analysis/CostModel/X86/fshr.ll
+++ b/llvm/test/Analysis/CostModel/X86/fshr.ll
@@ -36,7 +36,7 @@ define void @var_funnel_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8 x i64
;
; AVX2-LABEL: 'var_funnel_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I64 = call i64 @llvm.fshr.i64(i64 %a64, i64 %b64, i64 %c64)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V4I64 = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %a256, <4 x i64> %b256, <4 x i64> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V8I64 = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %a512, <8 x i64> %b512, <8 x i64> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -100,7 +100,7 @@ define void @var_funnel_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16 x i3
;
; AVX2-LABEL: 'var_funnel_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = call i32 @llvm.fshr.i32(i32 %a32, i32 %b32, i32 %c32)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 9 for instruction: %V4I32 = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %a256, <8 x i32> %b256, <8 x i32> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V8I32 = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %a512, <16 x i32> %b512, <16 x i32> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -692,7 +692,7 @@ define void @constant_funnel_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8
;
; AVX2-LABEL: 'constant_funnel_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I64 = call i64 @llvm.fshr.i64(i64 %a64, i64 %b64, i64 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> <i64 1, i64 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %b128, <2 x i64> <i64 1, i64 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4I64 = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %a256, <4 x i64> %b256, <4 x i64> <i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8I64 = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %a512, <8 x i64> %b512, <8 x i64> <i64 1, i64 7, i64 15, i64 31, i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -756,7 +756,7 @@ define void @constant_funnel_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16
;
; AVX2-LABEL: 'constant_funnel_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %I32 = call i32 @llvm.fshr.i32(i32 %a32, i32 %b32, i32 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %b128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V4I32 = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %a256, <8 x i32> %b256, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 16 for instruction: %V8I32 = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %a512, <16 x i32> %b512, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1241,7 +1241,7 @@ define void @var_rotate_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8 x i64
;
; AVX2-LABEL: 'var_rotate_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.fshr.i64(i64 %a64, i64 %a64, i64 %c64)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I64 = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %a256, <4 x i64> %a256, <4 x i64> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8I64 = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %a512, <8 x i64> %a512, <8 x i64> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1305,7 +1305,7 @@ define void @var_rotate_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16 x i3
;
; AVX2-LABEL: 'var_rotate_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = call i32 @llvm.fshr.i32(i32 %a32, i32 %a32, i32 %c32)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 5 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> %c128)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> %c128)
; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4I32 = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %a256, <8 x i32> %a256, <8 x i32> %c256)
; AVX2-NEXT: Cost Model: Found an estimated cost of 14 for instruction: %V8I32 = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %a512, <16 x i32> %a512, <16 x i32> %c512)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1863,7 +1863,7 @@ define void @constant_rotate_i64(i64 %a64, <2 x i64> %a128, <4 x i64> %a256, <8
;
; AVX2-LABEL: 'constant_rotate_i64'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I64 = call i64 @llvm.fshr.i64(i64 %a64, i64 %a64, i64 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> <i64 1, i64 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I64 = call <2 x i64> @llvm.fshr.v2i64(<2 x i64> %a128, <2 x i64> %a128, <2 x i64> <i64 1, i64 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4I64 = call <4 x i64> @llvm.fshr.v4i64(<4 x i64> %a256, <4 x i64> %a256, <4 x i64> <i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8I64 = call <8 x i64> @llvm.fshr.v8i64(<8 x i64> %a512, <8 x i64> %a512, <8 x i64> <i64 1, i64 7, i64 15, i64 31, i64 1, i64 7, i64 15, i64 31>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
@@ -1927,7 +1927,7 @@ define void @constant_rotate_i32(i32 %a32, <4 x i32> %a128, <8 x i32> %a256, <16
;
; AVX2-LABEL: 'constant_rotate_i32'
; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %I32 = call i32 @llvm.fshr.i32(i32 %a32, i32 %a32, i32 7)
-; AVX2-NEXT: Cost Model: Found an estimated cost of 4 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
+; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V2I32 = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a128, <4 x i32> %a128, <4 x i32> <i32 4, i32 5, i32 6, i32 7>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %V4I32 = call <8 x i32> @llvm.fshr.v8i32(<8 x i32> %a256, <8 x i32> %a256, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 12 for instruction: %V8I32 = call <16 x i32> @llvm.fshr.v16i32(<16 x i32> %a512, <16 x i32> %a512, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 0, i32 1, i32 2, i32 3>)
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret void
diff --git a/llvm/test/Analysis/CostModel/X86/rem.ll b/llvm/test/Analysis/CostModel/X86/rem.ll
index d5c063a564eaa..9dcca434f5532 100644
--- a/llvm/test/Analysis/CostModel/X86/rem.ll
+++ b/llvm/test/Analysis/CostModel/X86/rem.ll
@@ -804,11 +804,11 @@ define i32 @srem_constpow2() {
;
; AVX2-LABEL: 'srem_constpow2'
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I64 = srem i64 undef, 16
-; AVX2-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V2i64 = srem <2 x i64> undef, <i64 8, i64 16>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V2i64 = srem <2 x i64> undef, <i64 8, i64 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 18 for instruction: %V4i64 = srem <4 x i64> undef, <i64 2, i64 4, i64 8, i64 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 36 for instruction: %V8i64 = srem <8 x i64> undef, <i64 2, i64 4, i64 8, i64 16, i64 32, i64 64, i64 128, i64 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I32 = srem i32 undef, 16
-; AVX2-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V4i32 = srem <4 x i32> undef, <i32 2, i32 4, i32 8, i32 16>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V4i32 = srem <4 x i32> undef, <i32 2, i32 4, i32 8, i32 16>
; AVX2-NEXT: Cost Model: Found an estimated cost of 10 for instruction: %V8i32 = srem <8 x i32> undef, <i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 20 for instruction: %V16i32 = srem <16 x i32> undef, <i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256, i32 2, i32 4, i32 8, i32 16, i32 32, i32 64, i32 128, i32 256>
; AVX2-NEXT: Cost Model: Found an estimated cost of 6 for instruction: %I16 = srem i16 undef, 16
diff --git a/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll b/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
index 067aaba448bc4..bb116ebc25d50 100644
--- a/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
+++ b/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost-inseltpoison.ll
@@ -123,16 +123,12 @@ define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
-; XOPAVX1-LABEL: 'var_shift_v4i32'
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, %b
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v4i32'
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
+; XOP-LABEL: 'var_shift_v4i32'
+; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, %b
+; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX512-LABEL: 'var_shift_v4i32'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
@@ -1183,7 +1179,7 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'constant_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'constant_shift_v4i32'
diff --git a/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll b/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
index 24abcc7811193..2fa4217e0fa76 100644
--- a/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
+++ b/llvm/test/Analysis/CostModel/X86/vshift-ashr-cost.ll
@@ -123,16 +123,12 @@ define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
-; XOPAVX1-LABEL: 'var_shift_v4i32'
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, %b
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v4i32'
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
+; XOP-LABEL: 'var_shift_v4i32'
+; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, %b
+; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX512-LABEL: 'var_shift_v4i32'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, %b
@@ -1183,7 +1179,7 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'constant_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = ashr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = ashr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'constant_shift_v4i32'
diff --git a/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll b/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
index e2b07affe20eb..cae53b878a53c 100644
--- a/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
+++ b/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost-inseltpoison.ll
@@ -32,16 +32,12 @@ define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'var_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
-; XOPAVX1-LABEL: 'var_shift_v2i64'
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, %b
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v2i64'
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %b
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
+; XOP-LABEL: 'var_shift_v2i64'
+; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, %b
+; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX512-LABEL: 'var_shift_v2i64'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %b
@@ -135,16 +131,12 @@ define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
-; XOPAVX1-LABEL: 'var_shift_v4i32'
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, %b
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v4i32'
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, %b
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
+; XOP-LABEL: 'var_shift_v4i32'
+; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, %b
+; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX512-LABEL: 'var_shift_v4i32'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, %b
@@ -1104,7 +1096,7 @@ define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'constant_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, <i64 1, i64 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, <i64 1, i64 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; XOP-LABEL: 'constant_shift_v2i64'
@@ -1203,7 +1195,7 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'constant_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'constant_shift_v4i32'
diff --git a/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll b/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
index e60fcad119be4..7f61ee8b7bd91 100644
--- a/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
+++ b/llvm/test/Analysis/CostModel/X86/vshift-lshr-cost.ll
@@ -32,16 +32,12 @@ define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'var_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
-; XOPAVX1-LABEL: 'var_shift_v2i64'
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, %b
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v2i64'
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %b
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
+; XOP-LABEL: 'var_shift_v2i64'
+; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, %b
+; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX512-LABEL: 'var_shift_v2i64'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, %b
@@ -135,16 +131,12 @@ define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
-; XOPAVX1-LABEL: 'var_shift_v4i32'
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, %b
-; XOPAVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; XOPAVX2-LABEL: 'var_shift_v4i32'
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, %b
-; XOPAVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
+; XOP-LABEL: 'var_shift_v4i32'
+; XOP-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, %b
+; XOP-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX512-LABEL: 'var_shift_v4i32'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, %b
@@ -1104,7 +1096,7 @@ define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'constant_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <2 x i64> %a, <i64 1, i64 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <2 x i64> %a, <i64 1, i64 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; XOP-LABEL: 'constant_shift_v2i64'
@@ -1203,7 +1195,7 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'constant_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = lshr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = lshr <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'constant_shift_v4i32'
diff --git a/llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll b/llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
index 1e9c62080ce6d..84011e14cbad7 100644
--- a/llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
+++ b/llvm/test/Analysis/CostModel/X86/vshift-shl-cost-inseltpoison.ll
@@ -32,7 +32,7 @@ define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'var_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <2 x i64> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <2 x i64> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; XOP-LABEL: 'var_shift_v2i64'
@@ -131,7 +131,7 @@ define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'var_shift_v4i32'
@@ -1096,7 +1096,7 @@ define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'constant_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <2 x i64> %a, <i64 1, i64 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <2 x i64> %a, <i64 1, i64 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; XOP-LABEL: 'constant_shift_v2i64'
@@ -1190,13 +1190,9 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
-; AVX1-LABEL: 'constant_shift_v4i32'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; AVX2-LABEL: 'constant_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
+; AVX-LABEL: 'constant_shift_v4i32'
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'constant_shift_v4i32'
; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
@@ -1205,10 +1201,6 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; AVX512-LABEL: 'constant_shift_v4i32'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; BTVER2-LABEL: 'constant_shift_v4i32'
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
%shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
ret <4 x i32> %shift
@@ -1857,13 +1849,9 @@ define <4 x i32> @test3(<4 x i32> %a) {
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
-; AVX1-LABEL: 'test3'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; AVX2-LABEL: 'test3'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
+; AVX-LABEL: 'test3'
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
; XOP-LABEL: 'test3'
; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
@@ -1872,10 +1860,6 @@ define <4 x i32> @test3(<4 x i32> %a) {
; AVX512-LABEL: 'test3'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; BTVER2-LABEL: 'test3'
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
%shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
ret <4 x i32> %shl
@@ -1890,13 +1874,9 @@ define <4 x i32> @test4(<4 x i32> %a) {
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
-; AVX1-LABEL: 'test4'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; AVX2-LABEL: 'test4'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
+; AVX-LABEL: 'test4'
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
; XOP-LABEL: 'test4'
; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
@@ -1905,10 +1885,6 @@ define <4 x i32> @test4(<4 x i32> %a) {
; AVX512-LABEL: 'test4'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; BTVER2-LABEL: 'test4'
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
%shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
ret <4 x i32> %shl
@@ -1929,7 +1905,7 @@ define <2 x i64> @test5(<2 x i64> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shl
;
; AVX2-LABEL: 'test5'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <2 x i64> %a, <i64 2, i64 3>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <2 x i64> %a, <i64 2, i64 3>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shl
;
; XOP-LABEL: 'test5'
diff --git a/llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll b/llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
index 6ecbd3e13b581..6f3b01a25dbe8 100644
--- a/llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
+++ b/llvm/test/Analysis/CostModel/X86/vshift-shl-cost.ll
@@ -32,7 +32,7 @@ define <2 x i64> @var_shift_v2i64(<2 x i64> %a, <2 x i64> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'var_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <2 x i64> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <2 x i64> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; XOP-LABEL: 'var_shift_v2i64'
@@ -131,7 +131,7 @@ define <4 x i32> @var_shift_v4i32(<4 x i32> %a, <4 x i32> %b) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; AVX2-LABEL: 'var_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, %b
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, %b
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'var_shift_v4i32'
@@ -1096,7 +1096,7 @@ define <2 x i64> @constant_shift_v2i64(<2 x i64> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; AVX2-LABEL: 'constant_shift_v2i64'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <2 x i64> %a, <i64 1, i64 7>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <2 x i64> %a, <i64 1, i64 7>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shift
;
; XOP-LABEL: 'constant_shift_v2i64'
@@ -1190,13 +1190,9 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
-; AVX1-LABEL: 'constant_shift_v4i32'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; AVX2-LABEL: 'constant_shift_v4i32'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
+; AVX-LABEL: 'constant_shift_v4i32'
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
; XOP-LABEL: 'constant_shift_v4i32'
; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
@@ -1205,10 +1201,6 @@ define <4 x i32> @constant_shift_v4i32(<4 x i32> %a) {
; AVX512-LABEL: 'constant_shift_v4i32'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
-;
-; BTVER2-LABEL: 'constant_shift_v4i32'
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shift
;
%shift = shl <4 x i32> %a, <i32 4, i32 5, i32 6, i32 7>
ret <4 x i32> %shift
@@ -1857,13 +1849,9 @@ define <4 x i32> @test3(<4 x i32> %a) {
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
-; AVX1-LABEL: 'test3'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; AVX2-LABEL: 'test3'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
+; AVX-LABEL: 'test3'
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
; XOP-LABEL: 'test3'
; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
@@ -1872,10 +1860,6 @@ define <4 x i32> @test3(<4 x i32> %a) {
; AVX512-LABEL: 'test3'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; BTVER2-LABEL: 'test3'
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
%shl = shl <4 x i32> %a, <i32 1, i32 -1, i32 2, i32 -3>
ret <4 x i32> %shl
@@ -1890,13 +1874,9 @@ define <4 x i32> @test4(<4 x i32> %a) {
; SSE42-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
; SSE42-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
-; AVX1-LABEL: 'test4'
-; AVX1-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
-; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; AVX2-LABEL: 'test4'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
-; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
+; AVX-LABEL: 'test4'
+; AVX-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
+; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
; XOP-LABEL: 'test4'
; XOP-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
@@ -1905,10 +1885,6 @@ define <4 x i32> @test4(<4 x i32> %a) {
; AVX512-LABEL: 'test4'
; AVX512-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
; AVX512-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
-;
-; BTVER2-LABEL: 'test4'
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
-; BTVER2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <4 x i32> %shl
;
%shl = shl <4 x i32> %a, <i32 0, i32 0, i32 1, i32 1>
ret <4 x i32> %shl
@@ -1929,7 +1905,7 @@ define <2 x i64> @test5(<2 x i64> %a) {
; AVX1-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shl
;
; AVX2-LABEL: 'test5'
-; AVX2-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %shl = shl <2 x i64> %a, <i64 2, i64 3>
+; AVX2-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %shl = shl <2 x i64> %a, <i64 2, i64 3>
; AVX2-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret <2 x i64> %shl
;
; XOP-LABEL: 'test5'
diff --git a/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant-inseltpoison.ll b/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant-inseltpoison.ll
index 9f41db0c9e324..4e6d67ca7623e 100644
--- a/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant-inseltpoison.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant-inseltpoison.ll
@@ -164,20 +164,13 @@ define <2 x i64> @shl_constant_op0_load(i64* %p) {
}
define <4 x i32> @shl_constant_op0_multiuse(i32 %a0, <4 x i32> %a1) {
-; SSE-LABEL: @shl_constant_op0_multiuse(
-; SSE-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
-; SSE-NEXT: [[MUL_SCALAR:%.*]] = shl i32 [[A0]], 3
-; SSE-NEXT: [[MUL:%.*]] = insertelement <4 x i32> <i32 0, i32 16, i32 64, i32 192>, i32 [[MUL_SCALAR]], i64 0
-; SSE-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
-; SSE-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
-; SSE-NEXT: ret <4 x i32> [[XOR]]
-;
-; AVX-LABEL: @shl_constant_op0_multiuse(
-; AVX-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
-; AVX-NEXT: [[MUL:%.*]] = shl <4 x i32> [[INS]], <i32 3, i32 4, i32 5, i32 6>
-; AVX-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
-; AVX-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
-; AVX-NEXT: ret <4 x i32> [[XOR]]
+; CHECK-LABEL: @shl_constant_op0_multiuse(
+; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
+; CHECK-NEXT: [[MUL_SCALAR:%.*]] = shl i32 [[A0]], 3
+; CHECK-NEXT: [[MUL:%.*]] = insertelement <4 x i32> <i32 0, i32 16, i32 64, i32 192>, i32 [[MUL_SCALAR]], i64 0
+; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
+; CHECK-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
+; CHECK-NEXT: ret <4 x i32> [[XOR]]
;
%ins = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 %a0, i32 0
%mul = shl <4 x i32> %ins, <i32 3, i32 4, i32 5, i32 6>
diff --git a/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll b/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
index 0637b5005683f..1591202e55cbe 100644
--- a/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
+++ b/llvm/test/Transforms/VectorCombine/X86/insert-binop-with-constant.ll
@@ -164,20 +164,13 @@ define <2 x i64> @shl_constant_op0_load(i64* %p) {
}
define <4 x i32> @shl_constant_op0_multiuse(i32 %a0, <4 x i32> %a1) {
-; SSE-LABEL: @shl_constant_op0_multiuse(
-; SSE-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
-; SSE-NEXT: [[MUL_SCALAR:%.*]] = shl i32 [[A0]], 3
-; SSE-NEXT: [[MUL:%.*]] = insertelement <4 x i32> <i32 0, i32 16, i32 64, i32 192>, i32 [[MUL_SCALAR]], i64 0
-; SSE-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
-; SSE-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
-; SSE-NEXT: ret <4 x i32> [[XOR]]
-;
-; AVX-LABEL: @shl_constant_op0_multiuse(
-; AVX-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
-; AVX-NEXT: [[MUL:%.*]] = shl <4 x i32> [[INS]], <i32 3, i32 4, i32 5, i32 6>
-; AVX-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
-; AVX-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
-; AVX-NEXT: ret <4 x i32> [[XOR]]
+; CHECK-LABEL: @shl_constant_op0_multiuse(
+; CHECK-NEXT: [[INS:%.*]] = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 [[A0:%.*]], i32 0
+; CHECK-NEXT: [[MUL_SCALAR:%.*]] = shl i32 [[A0]], 3
+; CHECK-NEXT: [[MUL:%.*]] = insertelement <4 x i32> <i32 0, i32 16, i32 64, i32 192>, i32 [[MUL_SCALAR]], i64 0
+; CHECK-NEXT: [[AND:%.*]] = and <4 x i32> [[INS]], [[A1:%.*]]
+; CHECK-NEXT: [[XOR:%.*]] = xor <4 x i32> [[AND]], [[MUL]]
+; CHECK-NEXT: ret <4 x i32> [[XOR]]
;
%ins = insertelement <4 x i32> <i32 undef, i32 1, i32 2, i32 3>, i32 %a0, i32 0
%mul = shl <4 x i32> %ins, <i32 3, i32 4, i32 5, i32 6>
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