[PATCH] D102990: [X86][Costmodel] getMaskedMemoryOpCost(): don't scalarize non-power-of-two vectors with legal element type

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun May 23 12:00:40 PDT 2021


lebedev.ri created this revision.
lebedev.ri added reviewers: RKSimon, ABataev, delena.
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This follows in steps of similar `getMemoryOpCost()` changes, D100099 <https://reviews.llvm.org/D100099>/D100684 <https://reviews.llvm.org/D100684>.

Intel SDM, `VPMASKMOV — Conditional SIMD Integer Packed Loads and Stores`:

  Faults occur only due to mask-bit required memory accesses that caused the faults. Faults will not occur due to
  referencing any memory location if the corresponding mask bit for that memory location is 0. For example, no
  faults will be detected if the mask bits are all zero.

I.e., if mask is all-zeros, any address is fine.

Masked load/store's prime use-case is e.g. tail masking the loop remainder,
where for the last iteration, only first some few elements of a vector exist.

So much similarly, i don't see why must we scalarize non-power-of-two vectors,
iff the element type is something we can masked- store/load.
We simply need to legalize it, widen the mask, and be done with it.
And we even already count the cost of widening the mask.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D102990

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/masked-intrinsic-cost.ll

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