[PATCH] D102918: [RISCV] Avoid undef result due to promotion of FPOWI exponent

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

Ok I missed the other patches this is linked to. The RISCV64 ABI is to pass int as an i64 that has been sign extended which is what we were doing.

So should we Custom type legalize to the exact sequence we were using before?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102918/new/

https://reviews.llvm.org/D102918