[PATCH] D102893: [RISCV] Optimize xor/or with immediate in the zbs extension

[Ben Shi via Phabricator via llvm-commits]

benshi001 added inline comments.


================
Comment at: llvm/test/CodeGen/RISCV/rv64zbs.ll:1426
 ; RV64IB:       # %bb.0:
-; RV64IB-NEXT:    lui a1, 2
-; RV64IB-NEXT:    addiw a1, a1, -2045
-; RV64IB-NEXT:    or a0, a0, a1
+; RV64IB-NEXT:    ori a0, a0, 3
+; RV64IB-NEXT:    bseti a0, a0, 11
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craig.topper wrote:
> This isn't really an improvement.
It saves an extra register.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102893/new/

https://reviews.llvm.org/D102893