[llvm] a888e49 - [IR] Memory intrinsics are not unconditionally `nosync`
Nicolai Hähnle via llvm-commits
llvm-commits at lists.llvm.org
Thu May 20 18:41:15 PDT 2021
Author: Nicolai Hähnle
Date: 2021-05-21T03:40:59+02:00
New Revision: a888e492f601644f44b843373039966e7acacd31
URL: https://github.com/llvm/llvm-project/commit/a888e492f601644f44b843373039966e7acacd31
DIFF: https://github.com/llvm/llvm-project/commit/a888e492f601644f44b843373039966e7acacd31.diff
LOG: [IR] Memory intrinsics are not unconditionally `nosync`
Remove the `nosync` attribute from the memory intrinsic definitions
(i.e. memset, memcpy, memmove).
Like native memory accesses, memory intrinsics can be volatile. This is
indicated by an immarg in the intrinsic call. All else equal, a volatile
memory intrinsic is `sync`, so we cannot annotate the intrinsic functions
themselves as `nosync`. The attributor and function-attr passes know to
take the volatile bit into account.
Since `nosync` is a default attribute, this means we have to stop using
the DefaultAttrIntrinsic tablegen class for memory intrinsics, and
specify all default attributes other than `nosync` explicitly.
Most of the test changes are trivial churn, but one test case
(in nosync.ll) was in fact incorrect before this change.
Differential Revision: https://reviews.llvm.org/D102295
Added:
Modified:
llvm/include/llvm/IR/Intrinsics.td
llvm/test/Analysis/BasicAA/cs-cs.ll
llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
llvm/test/Transforms/Attributor/heap_to_stack.ll
llvm/test/Transforms/Attributor/lowerheap.ll
llvm/test/Transforms/Attributor/nosync.ll
llvm/test/Transforms/DeadStoreElimination/multiblock-malloc-free.ll
llvm/test/Transforms/MemCpyOpt/memcpy.ll
llvm/test/Transforms/ObjCARC/nested.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/IR/Intrinsics.td b/llvm/include/llvm/IR/Intrinsics.td
index 75234ebd57df..215188e2f182 100644
--- a/llvm/include/llvm/IR/Intrinsics.td
+++ b/llvm/include/llvm/IR/Intrinsics.td
@@ -600,10 +600,10 @@ def int_call_preallocated_teardown : DefaultAttrsIntrinsic<[], [llvm_token_ty]>;
//===------------------- Standard C Library Intrinsics --------------------===//
//
-def int_memcpy : DefaultAttrsIntrinsic<[],
+def int_memcpy : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i1_ty],
- [IntrArgMemOnly, IntrWillReturn,
+ [IntrArgMemOnly, IntrWillReturn, IntrNoFree,
NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>,
NoAlias<ArgIndex<0>>, NoAlias<ArgIndex<1>>,
WriteOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>,
@@ -614,25 +614,26 @@ def int_memcpy : DefaultAttrsIntrinsic<[],
// external function.
// The third argument (specifying the size) must be a constant.
def int_memcpy_inline
- : DefaultAttrsIntrinsic<[],
+ : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty, llvm_i1_ty],
- [IntrArgMemOnly, IntrWillReturn,
+ [IntrArgMemOnly, IntrWillReturn, IntrNoFree,
NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>,
NoAlias<ArgIndex<0>>, NoAlias<ArgIndex<1>>,
WriteOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>,
ImmArg<ArgIndex<2>>, ImmArg<ArgIndex<3>>]>;
-def int_memmove : DefaultAttrsIntrinsic<[],
+def int_memmove : Intrinsic<[],
[llvm_anyptr_ty, llvm_anyptr_ty, llvm_anyint_ty,
llvm_i1_ty],
- [IntrArgMemOnly, IntrWillReturn,
+ [IntrArgMemOnly, IntrWillReturn, IntrNoFree,
NoCapture<ArgIndex<0>>, NoCapture<ArgIndex<1>>,
WriteOnly<ArgIndex<0>>, ReadOnly<ArgIndex<1>>,
ImmArg<ArgIndex<3>>]>;
-def int_memset : DefaultAttrsIntrinsic<[],
+def int_memset : Intrinsic<[],
[llvm_anyptr_ty, llvm_i8_ty, llvm_anyint_ty,
llvm_i1_ty],
[IntrWriteMem, IntrArgMemOnly, IntrWillReturn,
+ IntrNoFree,
NoCapture<ArgIndex<0>>, WriteOnly<ArgIndex<0>>,
ImmArg<ArgIndex<3>>]>;
diff --git a/llvm/test/Analysis/BasicAA/cs-cs.ll b/llvm/test/Analysis/BasicAA/cs-cs.ll
index 83c663933c6c..2c548896ce5a 100644
--- a/llvm/test/Analysis/BasicAA/cs-cs.ll
+++ b/llvm/test/Analysis/BasicAA/cs-cs.ll
@@ -387,8 +387,8 @@ entry:
}
-; CHECK: attributes #0 = { argmemonly nofree nosync nounwind willreturn writeonly }
-; CHECK-NEXT: attributes #1 = { argmemonly nofree nosync nounwind willreturn }
+; CHECK: attributes #0 = { argmemonly nofree nounwind willreturn writeonly }
+; CHECK-NEXT: attributes #1 = { argmemonly nofree nounwind willreturn }
; CHECK-NEXT: attributes #2 = { argmemonly nosync nounwind willreturn }
; CHECK-NEXT: attributes #3 = { noinline nounwind readonly }
; CHECK-NEXT: attributes #4 = { noinline nounwind writeonly }
diff --git a/llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll b/llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
index e68996163b82..556d721d6b2c 100644
--- a/llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
+++ b/llvm/test/Analysis/TypeBasedAliasAnalysis/functionattrs.ll
@@ -79,7 +79,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i64(i8*, i8*, i64, i1) nounwind
; CHECK: attributes #4 = { nofree nosync nounwind readnone willreturn mustprogress }
; CHECK: attributes #5 = { nofree nosync nounwind willreturn mustprogress }
; CHECK: attributes #6 = { nofree norecurse nosync nounwind willreturn mustprogress }
-; CHECK: attributes #7 = { argmemonly nofree nosync nounwind willreturn }
+; CHECK: attributes #7 = { argmemonly nofree nounwind willreturn }
; Root note.
!0 = !{ }
diff --git a/llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll b/llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
index f02a7d39afe6..809558b0aad7 100644
--- a/llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
+++ b/llvm/test/CodeGen/AMDGPU/addrspacecast-constantexpr.ll
@@ -98,7 +98,7 @@ define i32 addrspace(3)* @ret_constant_cast_group_gv_gep_to_flat_to_group() #1 {
ret i32 addrspace(3)* addrspacecast (i32 addrspace(4)* getelementptr ([256 x i32], [256 x i32] addrspace(4)* addrspacecast ([256 x i32] addrspace(3)* @lds.arr to [256 x i32] addrspace(4)*), i64 0, i64 8) to i32 addrspace(3)*)
}
-; HSA: attributes #0 = { argmemonly nofree nosync nounwind willreturn }
+; HSA: attributes #0 = { argmemonly nofree nounwind willreturn }
; HSA: attributes #1 = { nounwind }
; HSA: attributes #2 = { nounwind "amdgpu-queue-ptr" }
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
index cf3245d558eb..d247c41a90eb 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
@@ -195,13 +195,13 @@ attributes #2 = { argmemonly nounwind }
;.
; IS__TUNIT____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" }
; IS__TUNIT____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn }
-; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly }
+; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { nofree nosync nounwind willreturn }
;.
; IS__CGSCC____: attributes #[[ATTR0:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "target-features"="+avx2" }
; IS__CGSCC____: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind uwtable willreturn }
-; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly }
+; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { nounwind willreturn }
;.
diff --git a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
index 8d446f99286b..71d836b7c7b4 100644
--- a/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
+++ b/llvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
@@ -767,7 +767,7 @@ attributes #5 = { argmemonly nounwind }
; IS__TUNIT____: attributes #[[ATTR2:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "min-legal-vector-width"="256" "prefer-vector-width"="256" "target-features"="+avx512vl" }
; IS__TUNIT____: attributes #[[ATTR3:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "min-legal-vector-width"="512" "prefer-vector-width"="256" "target-features"="+avx2" }
; IS__TUNIT____: attributes #[[ATTR4:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "min-legal-vector-width"="256" "prefer-vector-width"="256" "target-features"="+avx2" }
-; IS__TUNIT____: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly }
+; IS__TUNIT____: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR6:[0-9]+]] = { willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR7:[0-9]+]] = { nofree nosync nounwind willreturn }
;.
@@ -776,7 +776,7 @@ attributes #5 = { argmemonly nounwind }
; IS__CGSCC____: attributes #[[ATTR2:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "min-legal-vector-width"="256" "prefer-vector-width"="256" "target-features"="+avx512vl" }
; IS__CGSCC____: attributes #[[ATTR3:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "min-legal-vector-width"="512" "prefer-vector-width"="256" "target-features"="+avx2" }
; IS__CGSCC____: attributes #[[ATTR4:[0-9]+]] = { argmemonly inlinehint nofree norecurse nosync nounwind uwtable willreturn "min-legal-vector-width"="256" "prefer-vector-width"="256" "target-features"="+avx2" }
-; IS__CGSCC____: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly }
+; IS__CGSCC____: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR6:[0-9]+]] = { willreturn writeonly }
; IS__CGSCC____: attributes #[[ATTR7:[0-9]+]] = { nounwind willreturn }
;.
diff --git a/llvm/test/Transforms/Attributor/heap_to_stack.ll b/llvm/test/Transforms/Attributor/heap_to_stack.ll
index 236431b5e458..599c8cb6995b 100644
--- a/llvm/test/Transforms/Attributor/heap_to_stack.ll
+++ b/llvm/test/Transforms/Attributor/heap_to_stack.ll
@@ -774,6 +774,6 @@ define void @test16d(i8 %v, i8** %P) {
; IS________NPM: attributes #[[ATTR2:[0-9]+]] = { nofree nounwind }
; IS________NPM: attributes #[[ATTR3]] = { noreturn }
; IS________NPM: attributes #[[ATTR4:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn }
-; IS________NPM: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly }
+; IS________NPM: attributes #[[ATTR5:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS________NPM: attributes #[[ATTR6]] = { nounwind }
;.
diff --git a/llvm/test/Transforms/Attributor/lowerheap.ll b/llvm/test/Transforms/Attributor/lowerheap.ll
index 39af3af09c7d..3388adaf76d8 100644
--- a/llvm/test/Transforms/Attributor/lowerheap.ll
+++ b/llvm/test/Transforms/Attributor/lowerheap.ll
@@ -66,6 +66,6 @@ attributes #0 = { nounwind willreturn }
; IS________OPM: attributes #[[ATTR1]] = { nounwind }
;.
; IS________NPM: attributes #[[ATTR0:[0-9]+]] = { nounwind willreturn }
-; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nosync nounwind willreturn writeonly }
+; IS________NPM: attributes #[[ATTR1:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
; IS________NPM: attributes #[[ATTR2]] = { nounwind }
;.
diff --git a/llvm/test/Transforms/Attributor/nosync.ll b/llvm/test/Transforms/Attributor/nosync.ll
index 31128cc3342f..cb2b7eddb064 100644
--- a/llvm/test/Transforms/Attributor/nosync.ll
+++ b/llvm/test/Transforms/Attributor/nosync.ll
@@ -404,16 +404,16 @@ declare void @llvm.memset(i8* %dest, i8 %val, i32 %len, i1 %isvolatile)
; It is odd to add nocapture but a result of the llvm.memcpy nocapture.
;
define i32 @memcpy_volatile(i8* %ptr1, i8* %ptr2) {
-; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn
+; IS__TUNIT____: Function Attrs: argmemonly nofree nounwind willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@memcpy_volatile
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR10:[0-9]+]] {
-; IS__TUNIT____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR17:[0-9]+]]
+; IS__TUNIT____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR18:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 4
;
-; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind willreturn
+; IS__CGSCC____: Function Attrs: argmemonly nofree nounwind willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@memcpy_volatile
; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8* nocapture nofree readonly [[PTR2:%.*]]) #[[ATTR10:[0-9]+]] {
-; IS__CGSCC____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR18:[0-9]+]]
+; IS__CGSCC____-NEXT: call void @llvm.memcpy.p0i8.p0i8.i32(i8* noalias nocapture nofree writeonly [[PTR1]], i8* noalias nocapture nofree readonly [[PTR2]], i32 noundef 8, i1 noundef true) #[[ATTR19:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 4
;
call void @llvm.memcpy(i8* %ptr1, i8* %ptr2, i32 8, i1 1)
@@ -428,13 +428,13 @@ define i32 @memset_non_volatile(i8* %ptr1, i8 %val) {
; IS__TUNIT____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__TUNIT____-LABEL: define {{[^@]+}}@memset_non_volatile
; IS__TUNIT____-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR11:[0-9]+]] {
-; IS__TUNIT____-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR18:[0-9]+]]
+; IS__TUNIT____-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR19:[0-9]+]]
; IS__TUNIT____-NEXT: ret i32 4
;
; IS__CGSCC____: Function Attrs: argmemonly nofree nosync nounwind willreturn writeonly
; IS__CGSCC____-LABEL: define {{[^@]+}}@memset_non_volatile
; IS__CGSCC____-SAME: (i8* nocapture nofree writeonly [[PTR1:%.*]], i8 [[VAL:%.*]]) #[[ATTR11:[0-9]+]] {
-; IS__CGSCC____-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR19:[0-9]+]]
+; IS__CGSCC____-NEXT: call void @llvm.memset.p0i8.i32(i8* nocapture nofree writeonly [[PTR1]], i8 [[VAL]], i32 noundef 8, i1 noundef false) #[[ATTR20:[0-9]+]]
; IS__CGSCC____-NEXT: ret i32 4
;
call void @llvm.memset(i8* %ptr1, i8 %val, i32 8, i1 0)
@@ -508,13 +508,13 @@ define float @cos_test2(float %x) {
; IS__TUNIT____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__TUNIT____-LABEL: define {{[^@]+}}@cos_test2
; IS__TUNIT____-SAME: (float [[X:%.*]]) #[[ATTR15]] {
-; IS__TUNIT____-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR19:[0-9]+]]
+; IS__TUNIT____-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR20:[0-9]+]]
; IS__TUNIT____-NEXT: ret float [[C]]
;
; IS__CGSCC____: Function Attrs: nofree nosync nounwind readnone willreturn
; IS__CGSCC____-LABEL: define {{[^@]+}}@cos_test2
; IS__CGSCC____-SAME: (float [[X:%.*]]) #[[ATTR16:[0-9]+]] {
-; IS__CGSCC____-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR20:[0-9]+]]
+; IS__CGSCC____-NEXT: [[C:%.*]] = call float @llvm.cos.f32(float [[X]]) #[[ATTR21:[0-9]+]]
; IS__CGSCC____-NEXT: ret float [[C]]
;
%c = call float @llvm.cos(float %x)
@@ -531,16 +531,17 @@ define float @cos_test2(float %x) {
; IS__TUNIT____: attributes #[[ATTR7]] = { nofree nounwind }
; IS__TUNIT____: attributes #[[ATTR8]] = { nofree nosync nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR9]] = { nofree nosync nounwind }
-; IS__TUNIT____: attributes #[[ATTR10]] = { argmemonly nofree nosync nounwind willreturn }
+; IS__TUNIT____: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; IS__TUNIT____: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__TUNIT____: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; IS__TUNIT____: attributes #[[ATTR13]] = { readnone }
; IS__TUNIT____: attributes #[[ATTR14]] = { nounwind }
; IS__TUNIT____: attributes #[[ATTR15]] = { nofree nosync nounwind readnone willreturn }
-; IS__TUNIT____: attributes #[[ATTR16:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
-; IS__TUNIT____: attributes #[[ATTR17]] = { willreturn }
-; IS__TUNIT____: attributes #[[ATTR18]] = { willreturn writeonly }
-; IS__TUNIT____: attributes #[[ATTR19]] = { readnone willreturn }
+; IS__TUNIT____: attributes #[[ATTR16:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
+; IS__TUNIT____: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
+; IS__TUNIT____: attributes #[[ATTR18]] = { willreturn }
+; IS__TUNIT____: attributes #[[ATTR19]] = { willreturn writeonly }
+; IS__TUNIT____: attributes #[[ATTR20]] = { readnone willreturn }
;.
; IS__CGSCC_OPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn }
@@ -552,17 +553,18 @@ define float @cos_test2(float %x) {
; IS__CGSCC_OPM: attributes #[[ATTR7]] = { nofree norecurse nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
-; IS__CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nosync nounwind willreturn }
+; IS__CGSCC_OPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_OPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; IS__CGSCC_OPM: attributes #[[ATTR13]] = { readnone }
; IS__CGSCC_OPM: attributes #[[ATTR14]] = { nounwind }
; IS__CGSCC_OPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_OPM: attributes #[[ATTR16]] = { nofree nosync nounwind readnone willreturn }
-; IS__CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
-; IS__CGSCC_OPM: attributes #[[ATTR18]] = { willreturn }
-; IS__CGSCC_OPM: attributes #[[ATTR19]] = { willreturn writeonly }
-; IS__CGSCC_OPM: attributes #[[ATTR20]] = { readnone willreturn }
+; IS__CGSCC_OPM: attributes #[[ATTR17:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
+; IS__CGSCC_OPM: attributes #[[ATTR18:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
+; IS__CGSCC_OPM: attributes #[[ATTR19]] = { willreturn }
+; IS__CGSCC_OPM: attributes #[[ATTR20]] = { willreturn writeonly }
+; IS__CGSCC_OPM: attributes #[[ATTR21]] = { readnone willreturn }
;.
; IS__CGSCC_NPM: attributes #[[ATTR0]] = { nofree norecurse nosync nounwind optsize readnone ssp uwtable willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR1]] = { argmemonly nofree norecurse nosync nounwind uwtable willreturn }
@@ -574,15 +576,16 @@ define float @cos_test2(float %x) {
; IS__CGSCC_NPM: attributes #[[ATTR7]] = { nofree norecurse nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR8]] = { nofree norecurse nosync nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR9]] = { nofree norecurse nosync nounwind }
-; IS__CGSCC_NPM: attributes #[[ATTR10]] = { argmemonly nofree nosync nounwind willreturn }
+; IS__CGSCC_NPM: attributes #[[ATTR10]] = { argmemonly nofree nounwind willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR11]] = { argmemonly nofree nosync nounwind willreturn writeonly }
; IS__CGSCC_NPM: attributes #[[ATTR12:[0-9]+]] = { convergent readnone }
; IS__CGSCC_NPM: attributes #[[ATTR13]] = { readnone }
; IS__CGSCC_NPM: attributes #[[ATTR14]] = { nounwind }
; IS__CGSCC_NPM: attributes #[[ATTR15]] = { nofree norecurse nosync nounwind readnone willreturn }
; IS__CGSCC_NPM: attributes #[[ATTR16]] = { nofree nosync nounwind readnone willreturn }
-; IS__CGSCC_NPM: attributes #[[ATTR17:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
-; IS__CGSCC_NPM: attributes #[[ATTR18]] = { willreturn }
-; IS__CGSCC_NPM: attributes #[[ATTR19]] = { willreturn writeonly }
-; IS__CGSCC_NPM: attributes #[[ATTR20]] = { readnone willreturn }
+; IS__CGSCC_NPM: attributes #[[ATTR17:[0-9]+]] = { argmemonly nofree nounwind willreturn writeonly }
+; IS__CGSCC_NPM: attributes #[[ATTR18:[0-9]+]] = { nofree nosync nounwind readnone speculatable willreturn }
+; IS__CGSCC_NPM: attributes #[[ATTR19]] = { willreturn }
+; IS__CGSCC_NPM: attributes #[[ATTR20]] = { willreturn writeonly }
+; IS__CGSCC_NPM: attributes #[[ATTR21]] = { readnone willreturn }
;.
diff --git a/llvm/test/Transforms/DeadStoreElimination/multiblock-malloc-free.ll b/llvm/test/Transforms/DeadStoreElimination/multiblock-malloc-free.ll
index 6051899e002a..c35fb30983f5 100644
--- a/llvm/test/Transforms/DeadStoreElimination/multiblock-malloc-free.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/multiblock-malloc-free.ll
@@ -239,7 +239,7 @@ declare %struct.NodePtrVecStruct* @NodePtrVec_new(i32)
define noalias %struct.SystemCallMapElementStruct* @SystemCallMapElement_new(i8* nocapture readonly %label, i32 %initialSize) {
; CHECK-LABEL: @SystemCallMapElement_new(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CALL:%.*]] = tail call dereferenceable_or_null(24) i8* @malloc(i64 24) #[[ATTR6:[0-9]+]]
+; CHECK-NEXT: [[CALL:%.*]] = tail call dereferenceable_or_null(24) i8* @malloc(i64 24) #[[ATTR7:[0-9]+]]
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to %struct.SystemCallMapElementStruct*
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8* [[CALL]], null
; CHECK-NEXT: br i1 [[TOBOOL]], label [[CLEANUP:%.*]], label [[IF_THEN:%.*]]
@@ -256,7 +256,7 @@ define noalias %struct.SystemCallMapElementStruct* @SystemCallMapElement_new(i8*
; CHECK-NEXT: tail call void @free(i8* nonnull [[CALL]])
; CHECK-NEXT: br label [[CLEANUP]]
; CHECK: if.end:
-; CHECK-NEXT: [[CALL6:%.*]] = tail call %struct.NodePtrVecStruct* @NodePtrVec_new(i32 [[INITIALSIZE:%.*]]) #[[ATTR4:[0-9]+]]
+; CHECK-NEXT: [[CALL6:%.*]] = tail call %struct.NodePtrVecStruct* @NodePtrVec_new(i32 [[INITIALSIZE:%.*]]) #[[ATTR5:[0-9]+]]
; CHECK-NEXT: [[NODES:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 16
; CHECK-NEXT: [[TMP2:%.*]] = bitcast i8* [[NODES]] to %struct.NodePtrVecStruct**
; CHECK-NEXT: store %struct.NodePtrVecStruct* [[CALL6]], %struct.NodePtrVecStruct** [[TMP2]], align 8
@@ -311,7 +311,7 @@ cleanup: ; preds = %entry, %if.end, %if
define noalias %struct.BitfieldStruct* @Bitfield_new(i32 %bitsNeeded) {
; CHECK-LABEL: @Bitfield_new(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[CALL:%.*]] = tail call dereferenceable_or_null(16) i8* @malloc(i64 16) #[[ATTR6]]
+; CHECK-NEXT: [[CALL:%.*]] = tail call dereferenceable_or_null(16) i8* @malloc(i64 16) #[[ATTR7]]
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i8* [[CALL]] to %struct.BitfieldStruct*
; CHECK-NEXT: [[TOBOOL:%.*]] = icmp eq i8* [[CALL]], null
; CHECK-NEXT: br i1 [[TOBOOL]], label [[CLEANUP:%.*]], label [[IF_END:%.*]]
@@ -319,7 +319,7 @@ define noalias %struct.BitfieldStruct* @Bitfield_new(i32 %bitsNeeded) {
; CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[BITSNEEDED:%.*]], 7
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[ADD]], 8
; CHECK-NEXT: [[CONV:%.*]] = sext i32 [[DIV]] to i64
-; CHECK-NEXT: [[CALL1:%.*]] = tail call i8* @calloc(i64 [[CONV]], i64 1) #[[ATTR7:[0-9]+]]
+; CHECK-NEXT: [[CALL1:%.*]] = tail call i8* @calloc(i64 [[CONV]], i64 1) #[[ATTR8:[0-9]+]]
; CHECK-NEXT: [[BITFIELD:%.*]] = getelementptr inbounds i8, i8* [[CALL]], i64 8
; CHECK-NEXT: [[TMP1:%.*]] = bitcast i8* [[BITFIELD]] to i8**
; CHECK-NEXT: store i8* [[CALL1]], i8** [[TMP1]], align 8
diff --git a/llvm/test/Transforms/MemCpyOpt/memcpy.ll b/llvm/test/Transforms/MemCpyOpt/memcpy.ll
index 96f4faa94791..6f0bd19b3ea1 100644
--- a/llvm/test/Transforms/MemCpyOpt/memcpy.ll
+++ b/llvm/test/Transforms/MemCpyOpt/memcpy.ll
@@ -381,8 +381,8 @@ declare void @llvm.memcpy.p1i8.p0i8.i64(i8 addrspace(1)* nocapture, i8* nocaptur
declare void @f1(%struct.big* nocapture sret(%struct.big))
declare void @f2(%struct.big*)
-; CHECK: attributes #1 = { argmemonly nofree nosync nounwind willreturn }
+; CHECK: attributes #1 = { argmemonly nofree nounwind willreturn }
; CHECK: attributes #2 = { nounwind ssp }
; CHECK: attributes #3 = { willreturn }
; CHECK: attributes #4 = { nounwind ssp uwtable }
-; CHECK: attributes #5 = { argmemonly nofree nosync nounwind willreturn writeonly }
+; CHECK: attributes #5 = { argmemonly nofree nounwind willreturn writeonly }
diff --git a/llvm/test/Transforms/ObjCARC/nested.ll b/llvm/test/Transforms/ObjCARC/nested.ll
index 5977e95f73cd..ff35e86039e9 100644
--- a/llvm/test/Transforms/ObjCARC/nested.ll
+++ b/llvm/test/Transforms/ObjCARC/nested.ll
@@ -821,5 +821,5 @@ entry:
; CHECK: attributes [[NUW]] = { nounwind }
-; CHECK: attributes #1 = { argmemonly nofree nosync nounwind willreturn writeonly }
+; CHECK: attributes #1 = { argmemonly nofree nounwind willreturn writeonly }
; CHECK: attributes #2 = { nonlazybind }
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