[PATCH] D102854: [RISCV] Optimize or/xor with immediate in the zbs extension

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoB.td:122
+    return false;
+  // Bit 11 of imm must be 0, otherwise i0 will be negative. And all bits
+  // beyond bit 11 of r will be set.
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What if bit 11 is the most significant set bit. We can use BSETI/BINVI for it and leave bits 10:0 for the ORI/XORI


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  https://reviews.llvm.org/D102854/new/

https://reviews.llvm.org/D102854