[PATCH] D100726: AMDGPU/GlobalISel: Legalize G_[SU]DIVREM instructions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 20 10:41:36 PDT 2021


arsenm added a comment.

LGTM except you don't need NoRegister all over the place



================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2825
   auto Cond = B.buildICmp(CmpInst::ICMP_UGE, S1, R, Y);
-  if (IsDiv)
+  if (DstDivReg != AMDGPU::NoRegister)
     Q = B.buildSelect(S32, Cond, B.buildAdd(S32, Q, One), Q);
----------------
Don't need the != NoRegister


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2831
   Cond = B.buildICmp(CmpInst::ICMP_UGE, S1, R, Y);
-  if (IsDiv)
-    B.buildSelect(DstReg, Cond, B.buildAdd(S32, Q, One), Q);
-  else
-    B.buildSelect(DstReg, Cond, B.buildSub(S32, R, Y), R);
+  if (DstDivReg != AMDGPU::NoRegister)
+    B.buildSelect(DstDivReg, Cond, B.buildAdd(S32, Q, One), Q);
----------------
Ditto


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2834
+
+  if (DstRemReg != AMDGPU::NoRegister)
+    B.buildSelect(DstRemReg, Cond, B.buildSub(S32, R, Y), R);
----------------
Ditto


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:2981
 
-  if (IsDiv) {
+  if (DstDivReg != AMDGPU::NoRegister) {
     auto Sel1 = B.buildSelect(
----------------
Ditto


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp:3068
+    DstDivReg = MI.getOperand(0).getReg();
+    DstRemReg = AMDGPU::NoRegister;
+    TmpDivReg = MRI.createGenericVirtualRegister(Ty);
----------------
This is default initialized


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D100726/new/

https://reviews.llvm.org/D100726



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