[PATCH] D102687: [RISCV] Ensure shuffle splat operands are type-legal

Thu May 20 09:41:40 PDT 2021

craig.topper added a comment.

In D102687#2770717 <https://reviews.llvm.org/D102687#2770717>, @frasercrmck wrote:

> In D102687#2769104 <https://reviews.llvm.org/D102687#2769104>, @craig.topper wrote:
>
>> I think the issue for X86 might be that NewNodesMustHaveLegalTypes is set after type legalization, but vector legalization is allowed to create illegal scalar types. A second type legalization runs after. Maybe we should add a bool parameter to the function that defaults to false, but can be set to true to request a legal type?
>
> Yeah that might be going on but I'm not sure. It's pretty finicky. I think X86 is calling this during lowering, which should be after all legalization? I think it's just managing to get the extracted scalar into a legal form before returning from the lowering method.

There are 2 different lowering stages. One in the LegalizeVectorOps and one in LegalizeDAG. There is a scalar type legalization step in between if needed. It looks like it was being called during shift lowering which would be in LegalizeVectorOps. While our SHUFFLE_VECTOR usage would be in LegalizeDAG.

> From a brief look, I believe that WebAssembly's use of this method would crash, but it unconditionally "any exts or truncs" the extracted value to i32, which I think (for their set of illegal types) is always folded into the `extract_vector_elt` and so the illegal type is quickly removed.
>
> AArch64's use also looks suspicious but since it's for scatter/gather I found it difficult to get an IR test case together which produces the right DAG.

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