[PATCH] D101834: [llvm][sve] Lowering for VLS MLOAD/MSTORE

David Truby via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 20 03:44:55 PDT 2021


DavidTruby updated this revision to Diff 346689.
DavidTruby added a comment.

Ensure v and s registers used are the same in <2 x half> tests


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101834/new/

https://reviews.llvm.org/D101834

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-stores.ll

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