[PATCH] D102498: [AArch64][SVE] Improve codegen for fixed length vector concat

Bradley Smith via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 20 03:24:43 PDT 2021


bsmith updated this revision to Diff 346682.
bsmith marked 2 inline comments as done.
bsmith added a comment.

- Remove handling of extra operands that don't exist in splice combine
- Allow splice combine to operate on fixed width vectors


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102498/new/

https://reviews.llvm.org/D102498

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-fixed-length-concat.ll
  llvm/test/CodeGen/AArch64/sve-fixed-length-shuffles.ll

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