[PATCH] D100788: [SystemZ] Support i128 inline asm operands

Ulrich Weigand via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 19 14:13:56 PDT 2021


uweigand added a comment.

In D100788#2769576 <https://reviews.llvm.org/D100788#2769576>, @jonpa wrote:

> Patch updated per review.
>
>> Can you elaborate? I thought InstrEmitter::EmitCopyFromReg() was supposed to also work with types that are not legal. It uses
>> SrcRC = TRI->getMinimalPhysRegClass(SrcReg, VT);
>> to get the RC for use with a physreg ...
>
> It does that for SrcRC, but for DstRC it calls getRegClassFor(). Another way of solving this might be to check if the type is legal and if not then take SrcRC (see patch).

Interesting.  Note that for legal type, UseRC is always non-null here due to the lines above:

  // Stick to the preferred register classes for legal types.
  if (TLI->isTypeLegal(VT))
    UseRC = TLI->getRegClassFor(VT, Node->isDivergent());

so we really should have never arrived at the (second) getRegClassFor.  Can you verify if that ever happens?



================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:964
   const TargetLowering &TLI = DAG.getTargetLoweringInfo();
+  const TargetRegisterClass *RC = getInlineAsmOpRegClass(DAG, Regs.front());
 
----------------
Moving Regs.front() out of the Regs.empty() check is probably not a good idea.


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  https://reviews.llvm.org/D100788/new/

https://reviews.llvm.org/D100788



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