[llvm] 5178574 - Revert "Do actual DCE in LoopUnroll (try 3)"
Amy Huang via llvm-commits
llvm-commits at lists.llvm.org
Wed May 19 08:53:57 PDT 2021
Author: Amy Huang
Date: 2021-05-19T08:53:38-07:00
New Revision: 517857421d2ffcebc20da2c68862f7a2ddebaa51
URL: https://github.com/llvm/llvm-project/commit/517857421d2ffcebc20da2c68862f7a2ddebaa51
DIFF: https://github.com/llvm/llvm-project/commit/517857421d2ffcebc20da2c68862f7a2ddebaa51.diff
LOG: Revert "Do actual DCE in LoopUnroll (try 3)"
This reverts commit b6320eeb8622f05e4a5d4c7f5420523357490fca
as it causes clang to assert; see
https://reviews.llvm.org/rGb6320eeb8622f05e4a5d4c7f5420523357490fca.
Added:
Modified:
llvm/lib/Transforms/Utils/LoopUnroll.cpp
llvm/test/Transforms/LoopUnroll/AArch64/full-unroll-trip-count-upper-bound.ll
llvm/test/Transforms/LoopUnroll/full-unroll-invariant.ll
llvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll
llvm/test/Transforms/LoopUnroll/optsize-loop-size.ll
llvm/test/Transforms/LoopUnroll/pr45939-peel-count-and-complete-unroll.ll
llvm/test/Transforms/LoopUnroll/scevunroll.ll
llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll
llvm/test/Transforms/LoopUnroll/unroll-unconditional-latch.ll
llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
Removed:
llvm/test/Transforms/LoopUnroll/dce.ll
################################################################################
diff --git a/llvm/lib/Transforms/Utils/LoopUnroll.cpp b/llvm/lib/Transforms/Utils/LoopUnroll.cpp
index 395d2af56b53..20bf5a25d5a7 100644
--- a/llvm/lib/Transforms/Utils/LoopUnroll.cpp
+++ b/llvm/lib/Transforms/Utils/LoopUnroll.cpp
@@ -213,27 +213,33 @@ void llvm::simplifyLoopAfterUnroll(Loop *L, bool SimplifyIVs, LoopInfo *LI,
// Aggressively clean up dead instructions that simplifyLoopIVs already
// identified. Any remaining should be cleaned up below.
- RecursivelyDeleteTriviallyDeadInstructions(DeadInsts);
+ while (!DeadInsts.empty()) {
+ Value *V = DeadInsts.pop_back_val();
+ if (Instruction *Inst = dyn_cast_or_null<Instruction>(V))
+ RecursivelyDeleteTriviallyDeadInstructions(Inst);
+ }
}
- // At this point, the code is well formed. Perform constprop, instsimplify,
- // and dce.
+ // At this point, the code is well formed. We now do a quick sweep over the
+ // inserted code, doing constant propagation and dead code elimination as we
+ // go.
const DataLayout &DL = L->getHeader()->getModule()->getDataLayout();
- SmallVector<WeakTrackingVH, 16> DeadInsts;
for (BasicBlock *BB : L->getBlocks()) {
for (BasicBlock::iterator I = BB->begin(), E = BB->end(); I != E;) {
Instruction *Inst = &*I++;
+
if (Value *V = SimplifyInstruction(Inst, {DL, nullptr, DT, AC}))
if (LI->replacementPreservesLCSSAForm(Inst, V))
Inst->replaceAllUsesWith(V);
if (isInstructionTriviallyDead(Inst))
- DeadInsts.emplace_back(Inst);
+ BB->getInstList().erase(Inst);
}
- // We can't do recursive deletion until we're done iterating, as we might
- // have a phi which (potentially indirectly) uses instructions later in
- // the block we're iterating through.
- RecursivelyDeleteTriviallyDeadInstructions(DeadInsts);
}
+
+ // TODO: after peeling or unrolling, previously loop variant conditions are
+ // likely to fold to constants, eagerly propagating those here will require
+ // fewer cleanup passes to be run. Alternatively, a LoopEarlyCSE might be
+ // appropriate.
}
/// Unroll the given loop by Count. The loop must be in LCSSA form. Unrolling
diff --git a/llvm/test/Transforms/LoopUnroll/AArch64/full-unroll-trip-count-upper-bound.ll b/llvm/test/Transforms/LoopUnroll/AArch64/full-unroll-trip-count-upper-bound.ll
index b924d74166d7..5c70a2668db1 100644
--- a/llvm/test/Transforms/LoopUnroll/AArch64/full-unroll-trip-count-upper-bound.ll
+++ b/llvm/test/Transforms/LoopUnroll/AArch64/full-unroll-trip-count-upper-bound.ll
@@ -11,13 +11,12 @@
; }
;
; This test is meant to check that this loop is unrolled into four iterations.
-; Note that the load on the last iteration is dead and thus doesn't appear in
-; the output.
; UNROLL-LABEL: @test
; UNROLL: load i32, i32*
; UNROLL: load i32, i32*
; UNROLL: load i32, i32*
+; UNROLL: load i32, i32*
; UNROLL-NOT: load i32, i32*
; NOUNROLL-LABEL: @test
; NOUNROLL: load i32, i32*
diff --git a/llvm/test/Transforms/LoopUnroll/dce.ll b/llvm/test/Transforms/LoopUnroll/dce.ll
deleted file mode 100644
index db46e7ca5d55..000000000000
--- a/llvm/test/Transforms/LoopUnroll/dce.ll
+++ /dev/null
@@ -1,60 +0,0 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt -loop-unroll -S < %s | FileCheck %s
-
-; Can't recursively delete %c.addr.07 without deleting %conv1
-; and thus invalidating iteration.
-define void @PR50368(i32 %c, i64 %x) {
-; CHECK-LABEL: @PR50368(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: br label [[LOOP_PEEL_BEGIN:%.*]]
-; CHECK: loop.peel.begin:
-; CHECK-NEXT: br label [[LOOP_PEEL:%.*]]
-; CHECK: loop.peel:
-; CHECK-NEXT: br i1 false, label [[EXIT:%.*]], label [[LOOP_PEEL_NEXT:%.*]]
-; CHECK: loop.peel.next:
-; CHECK-NEXT: br label [[LOOP_PEEL_NEXT1:%.*]]
-; CHECK: loop.peel.next1:
-; CHECK-NEXT: br label [[ENTRY_PEEL_NEWPH:%.*]]
-; CHECK: entry.peel.newph:
-; CHECK-NEXT: br label [[LOOP:%.*]]
-; CHECK: loop:
-; CHECK-NEXT: br i1 false, label [[EXIT_LOOPEXIT:%.*]], label [[LOOP]], !llvm.loop [[LOOP0:![0-9]+]]
-; CHECK: exit.loopexit:
-; CHECK-NEXT: br label [[EXIT]]
-; CHECK: exit:
-; CHECK-NEXT: ret void
-;
-entry:
- br label %loop
-
-loop:
- %0 = phi i64 [ 0, %loop ], [ %x, %entry ]
- %c.addr.07 = phi i32 [ %conv1, %loop ], [ %c, %entry ]
- %conv1 = trunc i64 undef to i32
- br i1 false, label %exit, label %loop
-
-exit:
- ret void
-}
-
-
-define void @dead_chain(i64 %a) {
-; CHECK-LABEL: @dead_chain(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: br label [[LOOP:%.*]]
-; CHECK: loop:
-; CHECK-NEXT: ret void
-;
-entry:
- br label %loop
-
-loop:
- %conv1 = trunc i64 %a to i32
- %and = and i32 %conv1, 15
- %shl = shl i32 %and, 15
- br i1 true, label %exit, label %loop
-
-exit:
- ret void
-}
-
diff --git a/llvm/test/Transforms/LoopUnroll/full-unroll-invariant.ll b/llvm/test/Transforms/LoopUnroll/full-unroll-invariant.ll
index ce5649416f33..5e9f5d3a7fd3 100644
--- a/llvm/test/Transforms/LoopUnroll/full-unroll-invariant.ll
+++ b/llvm/test/Transforms/LoopUnroll/full-unroll-invariant.ll
@@ -34,7 +34,25 @@ define i32 @test2(i8 %a) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ZEXT_9:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[AND:%.*]] = and i32 [[ZEXT]], 31
+; CHECK-NEXT: [[ZEXT_1:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_1:%.*]] = and i32 [[ZEXT_1]], 31
+; CHECK-NEXT: [[ZEXT_2:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_2:%.*]] = and i32 [[ZEXT_2]], 31
+; CHECK-NEXT: [[ZEXT_3:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_3:%.*]] = and i32 [[ZEXT_3]], 31
+; CHECK-NEXT: [[ZEXT_4:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_4:%.*]] = and i32 [[ZEXT_4]], 31
+; CHECK-NEXT: [[ZEXT_5:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_5:%.*]] = and i32 [[ZEXT_5]], 31
+; CHECK-NEXT: [[ZEXT_6:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_6:%.*]] = and i32 [[ZEXT_6]], 31
+; CHECK-NEXT: [[ZEXT_7:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_7:%.*]] = and i32 [[ZEXT_7]], 31
+; CHECK-NEXT: [[ZEXT_8:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[AND_8:%.*]] = and i32 [[ZEXT_8]], 31
+; CHECK-NEXT: [[ZEXT_9:%.*]] = zext i8 [[A]] to i32
; CHECK-NEXT: [[AND_9:%.*]] = and i32 [[ZEXT_9]], 31
; CHECK-NEXT: [[SHL_9:%.*]] = shl i32 [[AND_9]], 15
; CHECK-NEXT: ret i32 [[SHL_9]]
@@ -61,7 +79,16 @@ define i32 @test3(i8 %a) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_BODY:%.*]]
; CHECK: for.body:
-; CHECK-NEXT: [[ZEXT_9:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i8 [[A:%.*]] to i32
+; CHECK-NEXT: [[ZEXT_1:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_2:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_3:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_4:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_5:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_6:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_7:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_8:%.*]] = zext i8 [[A]] to i32
+; CHECK-NEXT: [[ZEXT_9:%.*]] = zext i8 [[A]] to i32
; CHECK-NEXT: [[DIV_9:%.*]] = udiv i32 [[ZEXT_9]], 31
; CHECK-NEXT: ret i32 [[DIV_9]]
;
diff --git a/llvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll b/llvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll
index 995d5de0cdf7..b433ebb4d642 100644
--- a/llvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll
+++ b/llvm/test/Transforms/LoopUnroll/nonlatchcondbr.ll
@@ -40,6 +40,7 @@ define void @test1(i32* noalias %A) {
; CHECK: for.body.3:
; CHECK-NEXT: br i1 false, label [[FOR_BODY_FOR_BODY_CRIT_EDGE_3:%.*]], label [[FOR_END:%.*]]
; CHECK: for.body.for.body_crit_edge.3:
+; CHECK-NEXT: [[ARRAYIDX_PHI_TRANS_INSERT_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 4
; CHECK-NEXT: unreachable
;
entry:
@@ -123,7 +124,7 @@ define void @test2(i32* noalias %A) {
; CHECK: for.body.for.body_crit_edge.3:
; CHECK-NEXT: [[ARRAYIDX_PHI_TRANS_INSERT_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INC_3]]
; CHECK-NEXT: [[DOTPRE_3]] = load i32, i32* [[ARRAYIDX_PHI_TRANS_INSERT_3]], align 4
-; CHECK-NEXT: br label [[FOR_HEADER]], !llvm.loop [[LOOP0:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_HEADER]], !llvm.loop !0
;
entry:
br i1 true, label %for.preheader, label %for.end
@@ -201,7 +202,7 @@ define void @test3(i32* noalias %A, i1 %cond) {
; CHECK: for.body.for.body_crit_edge.3:
; CHECK-NEXT: [[ARRAYIDX_PHI_TRANS_INSERT_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i64 [[INC_3]]
; CHECK-NEXT: [[DOTPRE_3]] = load i32, i32* [[ARRAYIDX_PHI_TRANS_INSERT_3]], align 4
-; CHECK-NEXT: br label [[FOR_HEADER]], !llvm.loop [[LOOP2:![0-9]+]]
+; CHECK-NEXT: br label [[FOR_HEADER]], !llvm.loop !2
;
entry:
%0 = load i32, i32* %A, align 4
diff --git a/llvm/test/Transforms/LoopUnroll/optsize-loop-size.ll b/llvm/test/Transforms/LoopUnroll/optsize-loop-size.ll
index 659c7cf9af37..4ca397a1c770 100644
--- a/llvm/test/Transforms/LoopUnroll/optsize-loop-size.ll
+++ b/llvm/test/Transforms/LoopUnroll/optsize-loop-size.ll
@@ -12,6 +12,7 @@ define i32 @test(i32 %a, i32 %b, i32 %c) optsize {
; CHECK-NEXT: store i32 [[B:%.*]], i32* [[ARRAYINIT_ELEMENT]], align 4
; CHECK-NEXT: [[ARRAYINIT_ELEMENT1:%.*]] = getelementptr inbounds [3 x i32], [3 x i32]* [[REF_TMP]], i64 0, i64 2
; CHECK-NEXT: store i32 [[C:%.*]], i32* [[ARRAYINIT_ELEMENT1]], align 4
+; CHECK-NEXT: [[ADD_PTR_I_I:%.*]] = getelementptr inbounds [3 x i32], [3 x i32]* [[REF_TMP]], i64 0, i64 3
; CHECK-NEXT: [[CMP_I_I_I3:%.*]] = icmp slt i32 [[A]], [[B]]
; CHECK-NEXT: [[SPEC_SELECT_I_I4:%.*]] = select i1 [[CMP_I_I_I3]], i32* [[ARRAYINIT_ELEMENT]], i32* [[ARRAYINIT_BEGIN]]
; CHECK-NEXT: [[INCDEC_PTR_I_I5:%.*]] = getelementptr inbounds [3 x i32], [3 x i32]* [[REF_TMP]], i64 0, i64 2
@@ -21,6 +22,7 @@ define i32 @test(i32 %a, i32 %b, i32 %c) optsize {
; CHECK-NEXT: [[DOTPRE2:%.*]] = load i32, i32* [[INCDEC_PTR_I_I5]], align 4
; CHECK-NEXT: [[CMP_I_I_I:%.*]] = icmp slt i32 [[DOTPRE]], [[DOTPRE2]]
; CHECK-NEXT: [[SPEC_SELECT_I_I:%.*]] = select i1 [[CMP_I_I_I]], i32* [[INCDEC_PTR_I_I5]], i32* [[SPEC_SELECT_I_I4]]
+; CHECK-NEXT: [[INCDEC_PTR_I_I:%.*]] = getelementptr inbounds i32, i32* [[INCDEC_PTR_I_I5]], i64 1
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[SPEC_SELECT_I_I]], align 4
; CHECK-NEXT: ret i32 [[TMP1]]
;
diff --git a/llvm/test/Transforms/LoopUnroll/pr45939-peel-count-and-complete-unroll.ll b/llvm/test/Transforms/LoopUnroll/pr45939-peel-count-and-complete-unroll.ll
index d7325692fab3..633a2d24baf9 100644
--- a/llvm/test/Transforms/LoopUnroll/pr45939-peel-count-and-complete-unroll.ll
+++ b/llvm/test/Transforms/LoopUnroll/pr45939-peel-count-and-complete-unroll.ll
@@ -163,6 +163,7 @@ define void @test1() {
; PEEL8-NEXT: [[ARRAYIDX_7:%.*]] = getelementptr inbounds [8 x i32], [8 x i32]* @a, i64 0, i64 [[INDVARS_IV_NEXT_6]]
; PEEL8-NEXT: [[TMP15:%.*]] = trunc i64 [[INDVARS_IV_NEXT_6]] to i32
; PEEL8-NEXT: store i32 [[TMP15]], i32* [[ARRAYIDX_7]], align 4
+; PEEL8-NEXT: [[INDVARS_IV_NEXT_7:%.*]] = add nuw nsw i64 [[INDVARS_IV_NEXT_6]], 1
; PEEL8-NEXT: br label [[FOR_EXIT]]
; PEEL8: for.exit:
; PEEL8-NEXT: ret void
@@ -205,7 +206,7 @@ define void @test1() {
; PEEL2UNROLL2-NEXT: store i32 [[TMP3]], i32* [[ARRAYIDX_1]], align 4
; PEEL2UNROLL2-NEXT: [[INDVARS_IV_NEXT_1]] = add nuw nsw i64 [[INDVARS_IV_NEXT]], 1
; PEEL2UNROLL2-NEXT: [[EXITCOND_1:%.*]] = icmp ne i64 [[INDVARS_IV_NEXT_1]], 8
-; PEEL2UNROLL2-NEXT: br i1 [[EXITCOND_1]], label [[FOR_BODY]], label [[FOR_EXIT_LOOPEXIT:%.*]], !llvm.loop [[LOOP0:![0-9]+]]
+; PEEL2UNROLL2-NEXT: br i1 [[EXITCOND_1]], label [[FOR_BODY]], label [[FOR_EXIT_LOOPEXIT:%.*]], !llvm.loop !0
; PEEL2UNROLL2: for.exit.loopexit:
; PEEL2UNROLL2-NEXT: br label [[FOR_EXIT]]
; PEEL2UNROLL2: for.exit:
diff --git a/llvm/test/Transforms/LoopUnroll/scevunroll.ll b/llvm/test/Transforms/LoopUnroll/scevunroll.ll
index 566dbeb5fcd2..4d9ae39f721f 100644
--- a/llvm/test/Transforms/LoopUnroll/scevunroll.ll
+++ b/llvm/test/Transforms/LoopUnroll/scevunroll.ll
@@ -10,6 +10,7 @@
define i32 @sansCanonical(i32* %base) nounwind {
; CHECK-LABEL: @sansCanonical(
; CHECK-NEXT: entry:
+; CHECK-NEXT: [[ZEXT:%.*]] = zext i32 0 to i64
; CHECK-NEXT: br label [[WHILE_BODY:%.*]]
; CHECK: while.body:
; CHECK-NEXT: [[ADR:%.*]] = getelementptr inbounds i32, i32* [[BASE:%.*]], i64 9
@@ -38,6 +39,7 @@ define i32 @sansCanonical(i32* %base) nounwind {
; CHECK-NEXT: [[ADR_8:%.*]] = getelementptr inbounds i32, i32* [[BASE]], i64 1
; CHECK-NEXT: [[TMP_8:%.*]] = load i32, i32* [[ADR_8]], align 8
; CHECK-NEXT: [[SUM_NEXT_8:%.*]] = add i32 [[SUM_NEXT_7]], [[TMP_8]]
+; CHECK-NEXT: [[TMP_9:%.*]] = load i32, i32* [[BASE]], align 8
; CHECK-NEXT: ret i32 [[SUM_NEXT_8]]
;
entry:
diff --git a/llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll b/llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll
index 5b3729803303..4bbae7e83e9b 100644
--- a/llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll
+++ b/llvm/test/Transforms/LoopUnroll/unroll-header-exiting-with-phis.ll
@@ -10,18 +10,23 @@ define i16 @full_unroll(i16* %A) {
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
+; CHECK-NEXT: [[TMP2:%.*]] = load i16, i16* [[A:%.*]], align 2
; CHECK-NEXT: br label [[FOR_COND_CLEANUP3:%.*]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[DOTLCSSA10_LCSSA:%.*]] = phi i16 [ [[TMP2_2:%.*]], [[FOR_COND_CLEANUP3_2:%.*]] ]
; CHECK-NEXT: [[TMP3:%.*]] = call i16 @func(i16 [[DOTLCSSA10_LCSSA]])
; CHECK-NEXT: ret i16 0
; CHECK: for.cond.cleanup3:
+; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 1
+; CHECK-NEXT: [[TMP2_1:%.*]] = load i16, i16* [[PTR_1]], align 2
; CHECK-NEXT: br label [[FOR_COND_CLEANUP3_1:%.*]]
; CHECK: for.cond.cleanup3.1:
-; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i64 2
+; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 2
; CHECK-NEXT: [[TMP2_2]] = load i16, i16* [[PTR_2]], align 2
; CHECK-NEXT: br label [[FOR_COND_CLEANUP3_2]]
; CHECK: for.cond.cleanup3.2:
+; CHECK-NEXT: [[PTR_3:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 3
+; CHECK-NEXT: [[TMP2_3:%.*]] = load i16, i16* [[PTR_3]], align 2
; CHECK-NEXT: br i1 false, label [[FOR_COND_CLEANUP3_3:%.*]], label [[FOR_COND_CLEANUP:%.*]]
; CHECK: for.cond.cleanup3.3:
; CHECK-NEXT: unreachable
@@ -54,6 +59,8 @@ define i16 @partial_unroll(i16* %A) {
; CHECK-NEXT: br label [[FOR_COND:%.*]]
; CHECK: for.cond:
; CHECK-NEXT: [[I_0:%.*]] = phi i64 [ 0, [[ENTRY:%.*]] ], [ [[INC9_2:%.*]], [[FOR_COND_CLEANUP3_2:%.*]] ]
+; CHECK-NEXT: [[PTR:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i64 [[I_0]]
+; CHECK-NEXT: [[TMP2:%.*]] = load i16, i16* [[PTR]], align 2
; CHECK-NEXT: br label [[FOR_COND_CLEANUP3:%.*]]
; CHECK: for.cond.cleanup:
; CHECK-NEXT: [[DOTLCSSA10_LCSSA:%.*]] = phi i16 [ [[TMP2_1:%.*]], [[FOR_COND_CLEANUP3_1:%.*]] ]
@@ -61,11 +68,13 @@ define i16 @partial_unroll(i16* %A) {
; CHECK-NEXT: ret i16 0
; CHECK: for.cond.cleanup3:
; CHECK-NEXT: [[INC9:%.*]] = add nuw nsw i64 [[I_0]], 1
-; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds i16, i16* [[A:%.*]], i64 [[INC9]]
+; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 [[INC9]]
; CHECK-NEXT: [[TMP2_1]] = load i16, i16* [[PTR_1]], align 2
; CHECK-NEXT: br label [[FOR_COND_CLEANUP3_1]]
; CHECK: for.cond.cleanup3.1:
; CHECK-NEXT: [[INC9_1:%.*]] = add nuw nsw i64 [[INC9]], 1
+; CHECK-NEXT: [[PTR_2:%.*]] = getelementptr inbounds i16, i16* [[A]], i64 [[INC9_1]]
+; CHECK-NEXT: [[TMP2_2:%.*]] = load i16, i16* [[PTR_2]], align 2
; CHECK-NEXT: [[CMP_2:%.*]] = icmp ult i64 [[INC9_1]], 200
; CHECK-NEXT: br i1 [[CMP_2]], label [[FOR_COND_CLEANUP3_2]], label [[FOR_COND_CLEANUP:%.*]]
; CHECK: for.cond.cleanup3.2:
diff --git a/llvm/test/Transforms/LoopUnroll/unroll-unconditional-latch.ll b/llvm/test/Transforms/LoopUnroll/unroll-unconditional-latch.ll
index 4970a9080940..89d1144314b4 100644
--- a/llvm/test/Transforms/LoopUnroll/unroll-unconditional-latch.ll
+++ b/llvm/test/Transforms/LoopUnroll/unroll-unconditional-latch.ll
@@ -68,6 +68,7 @@ define double @test_with_lcssa(double %arg1, double* %arg2) {
; CHECK-NEXT: [[RES_LCSSA:%.*]] = phi double [ [[RES_1]], [[LOOP_LATCH]] ]
; CHECK-NEXT: ret double [[RES_LCSSA]]
; CHECK: loop.latch.1:
+; CHECK-NEXT: [[PTR_1:%.*]] = getelementptr inbounds double, double* [[ARG2]], i64 2
; CHECK-NEXT: unreachable
;
diff --git a/llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll b/llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
index 88fdd43fafff..5086b2019ced 100644
--- a/llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
+++ b/llvm/test/Transforms/LoopUnrollAndJam/unroll-and-jam.ll
@@ -141,6 +141,8 @@ target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
; CHECK-NEXT: [[ADD_LCSSA_EPIL_2:%.*]] = phi i32 [ [[ADD_EPIL_2]], [[FOR_INNER_EPIL_2]] ]
; CHECK-NEXT: [[ARRAYIDX6_EPIL_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 [[ADD8_EPIL_1]]
; CHECK-NEXT: store i32 [[ADD_LCSSA_EPIL_2]], i32* [[ARRAYIDX6_EPIL_2]], align 4, !tbaa !0
+; CHECK-NEXT: [[ADD8_EPIL_2:%.*]] = add nuw i32 [[ADD8_EPIL_1]], 1
+; CHECK-NEXT: [[EPIL_ITER_SUB_2:%.*]] = sub i32 [[EPIL_ITER_SUB_1]], 1
; CHECK-NEXT: br label [[FOR_END_LOOPEXIT_EPILOG_LCSSA]]
define void @test1(i32 %I, i32 %J, i32* noalias nocapture %A, i32* noalias nocapture readonly %B) #0 {
entry:
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