[llvm] 66513e2 - Revert "[X86] Limit X86InterleavedAccessGroup to handle the same type case only"
via llvm-commits
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Wed May 19 05:36:11 PDT 2021
Author: Wang, Pengfei
Date: 2021-05-19T20:35:45+08:00
New Revision: 66513e2f20d9885374d0df43a89fc768523d6354
URL: https://github.com/llvm/llvm-project/commit/66513e2f20d9885374d0df43a89fc768523d6354
DIFF: https://github.com/llvm/llvm-project/commit/66513e2f20d9885374d0df43a89fc768523d6354.diff
LOG: Revert "[X86] Limit X86InterleavedAccessGroup to handle the same type case only"
This reverts commit ca23a38e373142a18ab56700ba4f3b947bfe9db0.
Revert due to EXPENSIVE_CHECKS fail.
Added:
Modified:
llvm/lib/Target/X86/X86InterleavedAccess.cpp
llvm/test/CodeGen/X86/x86-interleaved-access.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InterleavedAccess.cpp b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
index 5faaf91b42e1..95655dd4723b 100644
--- a/llvm/lib/Target/X86/X86InterleavedAccess.cpp
+++ b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
@@ -733,9 +733,6 @@ bool X86InterleavedAccessGroup::lowerIntoOptimizedSequence() {
// results by generating some sort of (optimized) target-specific
// instructions.
- if (ShuffleTy->getNumElements() != NumSubVecElems)
- return false;
-
switch (NumSubVecElems) {
default:
return false;
diff --git a/llvm/test/CodeGen/X86/x86-interleaved-access.ll b/llvm/test/CodeGen/X86/x86-interleaved-access.ll
index 32598cdcbf08..f99b065bc2ec 100644
--- a/llvm/test/CodeGen/X86/x86-interleaved-access.ll
+++ b/llvm/test/CodeGen/X86/x86-interleaved-access.ll
@@ -1930,22 +1930,3 @@ define void @splat4_v4i64_load_store(<4 x i64>* %s, <16 x i64>* %d) {
store <16 x i64> %r, <16 x i64>* %d, align 8
ret void
}
-
-define <2 x i64> @PR37616(<16 x i64>* %a0) {
-; AVX1-LABEL: PR37616:
-; AVX1: # %bb.0:
-; AVX1-NEXT: vmovaps 16(%rdi), %xmm0
-; AVX1-NEXT: vunpcklpd {{.*#+}} xmm0 = xmm0[0],mem[0]
-; AVX1-NEXT: retq
-;
-; AVX2OR512-LABEL: PR37616:
-; AVX2OR512: # %bb.0:
-; AVX2OR512-NEXT: vmovaps (%rdi), %ymm0
-; AVX2OR512-NEXT: vunpcklpd {{.*#+}} ymm0 = ymm0[0],mem[0],ymm0[2],mem[2]
-; AVX2OR512-NEXT: vextractf128 $1, %ymm0, %xmm0
-; AVX2OR512-NEXT: vzeroupper
-; AVX2OR512-NEXT: retq
- %load = load <16 x i64>, <16 x i64>* %a0, align 128
- %shuffle = shufflevector <16 x i64> %load, <16 x i64> undef, <2 x i32> <i32 2, i32 6>
- ret <2 x i64> %shuffle
-}
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