[PATCH] D102391: [AMDGPU][GlobalISel] Legalize G_ABS

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll:13
+; GFX6:       ; %bb.0:
+; GFX6-NEXT:    s_sext_i32_i16 s1, s0
+; GFX6-NEXT:    s_ashr_i32 s1, s1, 15
----------------
This should be widened so we get s_sext followed by s_abs.


================
Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.abs.ll:68
+; GFX6:       ; %bb.0:
+; GFX6-NEXT:    v_bfe_i32 v1, v0, 0, 16
+; GFX6-NEXT:    v_ashrrev_i32_e32 v1, 15, v1
----------------
It would be simpler to widen this case to 32 bits, so we get the bfe followed by the usual 32-bit sub, max sequence.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102391/new/

https://reviews.llvm.org/D102391