[PATCH] D102333: [AArch64] Combine shift instructions in SelectionDAG

[Andrew Savonichev via Phabricator via llvm-commits]

asavonic updated this revision to Diff 346164.
asavonic added a comment.

- Used TLI.SimplifyDemandedBits for performShiftCombine.
- Extended SimplifyDemandedBits to cover AArch64 VLSHR + VSHL.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102333/new/

https://reviews.llvm.org/D102333

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/test/CodeGen/AArch64/aarch64-bswap-ext.ll

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