[PATCH] D102611: ARM: support mandatory tail calls

[Tim Northover via Phabricator via llvm-commits]

t.p.northover created this revision.
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This is obviously mostly for `swifttailcc`, but it's trivial to being `tailcc` and `fastcc` along for the ride so I did those too.

The code is pretty closely modelled on how AArch64 handles this because most RISC backends will need approximately the same behaviour, so there are a few main components:

- Track how much stack space the callee is expected to restore on return (and do it).
- In the tail call case arguments might not simply be stored to `sp + N`, but to an object at a fixed offset from the stack on function entry. We use a fixed frame-index for this, which naturally reserves the space so callee-saved registers won't be placed there.
- The tail call itself needs to track how much stack space it actually needs (because different tail calls vary this).


https://reviews.llvm.org/D102611

Files:
  llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
  llvm/lib/Target/ARM/ARMCallingConv.td
  llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp
  llvm/lib/Target/ARM/ARMFastISel.cpp
  llvm/lib/Target/ARM/ARMFrameLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/lib/Target/ARM/ARMISelLowering.h
  llvm/lib/Target/ARM/ARMInstrInfo.td
  llvm/lib/Target/ARM/ARMMachineFunctionInfo.h
  llvm/lib/Target/ARM/ARMSubtarget.cpp
  llvm/test/CodeGen/ARM/dbg-tcreturn.ll
  llvm/test/CodeGen/ARM/fastcc-tailcall.ll
  llvm/test/CodeGen/ARM/peephole-callee-save-regalloc.mir
  llvm/test/CodeGen/ARM/swifttailcc-call.ll
  llvm/test/CodeGen/ARM/swifttailcc-fastisel.ll
  llvm/test/CodeGen/ARM/tailcc-call.ll
  llvm/test/CodeGen/ARM/v8m-tail-call.ll

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