[llvm] 74ae778 - [PowerPC] Do not emit dssall on AIX
Nemanja Ivanovic via llvm-commits
llvm-commits at lists.llvm.org
Mon May 17 04:08:16 PDT 2021
Author: Nemanja Ivanovic
Date: 2021-05-17T06:08:06-05:00
New Revision: 74ae778176ec4dc8303e7f0c7dbab973c4c2e97c
URL: https://github.com/llvm/llvm-project/commit/74ae778176ec4dc8303e7f0c7dbab973c4c2e97c
DIFF: https://github.com/llvm/llvm-project/commit/74ae778176ec4dc8303e7f0c7dbab973c4c2e97c.diff
LOG: [PowerPC] Do not emit dssall on AIX
This instruction is a nop on all server cores (certainly on all
cores that AIX supports) so it is fine to emit a nop instead of it.
In fact, that is exactly what XL emits. So we emit a nop on AIX
and we leave the codegen as is on other platforms since there may
indeed be cores out there for which this actually does some prefetching.
Added:
llvm/test/CodeGen/PowerPC/dssall.ll
Modified:
llvm/lib/Target/PowerPC/PPCInstrAltivec.td
llvm/lib/Target/PowerPC/PPCInstrInfo.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
index 6dfa495b306a1..01f898ec908c4 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td
@@ -347,7 +347,7 @@ def DSS : DSS_Form<0, 822, (outs), (ins u5imm:$STRM),
}
def DSSALL : DSS_Form<1, 822, (outs), (ins),
- "dssall", IIC_LdStLoad /*FIXME*/, [(int_ppc_altivec_dssall)]>,
+ "dssall", IIC_LdStLoad /*FIXME*/, []>,
Deprecated<DeprecatedDST> {
let STRM = 0;
let A = 0;
@@ -865,6 +865,13 @@ def V_SETALLONES : VXForm_3<908, (outs vrrc:$vD), (ins),
def : InstAlias<"vmr $vD, $vA", (VOR vrrc:$vD, vrrc:$vA, vrrc:$vA)>;
def : InstAlias<"vnot $vD, $vA", (VNOR vrrc:$vD, vrrc:$vA, vrrc:$vA)>;
+// This is a nop on all supported architectures and the AIX assembler
+// doesn't support it (and will not be updated to support it).
+let Predicates = [IsAIX] in
+def : Pat<(int_ppc_altivec_dssall), (NOP)>;
+let Predicates = [NotAIX] in
+def : Pat<(int_ppc_altivec_dssall), (DSSALL)>;
+
// Rotates.
def : Pat<(v16i8 (rotl v16i8:$vA, v16i8:$vB)),
(v16i8 (VRLB v16i8:$vA, v16i8:$vB))>;
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 7936a4e125225..b839f38a250c0 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1178,6 +1178,8 @@ def IsNotISA3_1 : Predicate<"!Subtarget->isISA3_1()">;
// AIX assembler may not be modern enough to support some extended mne.
def ModernAs: Predicate<"!Subtarget->isAIXABI() || Subtarget->HasModernAIXAs">,
AssemblerPredicate<(any_of (not AIXOS), FeatureModernAIXAs)>;
+def IsAIX : Predicate<"Subtarget->isAIXABI()">;
+def NotAIX : Predicate<"!Subtarget->isAIXABI()">;
//===----------------------------------------------------------------------===//
// PowerPC Multiclass Definitions.
diff --git a/llvm/test/CodeGen/PowerPC/dssall.ll b/llvm/test/CodeGen/PowerPC/dssall.ll
new file mode 100644
index 0000000000000..c33b37cd53566
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/dssall.ll
@@ -0,0 +1,21 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc-ibm-aix-xcoff | \
+; RUN: FileCheck %s
+; RUN: llc -verify-machineinstrs < %s -mtriple=powerpc64le-- | \
+; RUN: FileCheck %s --check-prefix=NOTAIX
+define dso_local void @test() local_unnamed_addr {
+; CHECK-LABEL: test:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: nop
+; CHECK-NEXT: blr
+;
+; NOTAIX-LABEL: test:
+; NOTAIX: # %bb.0: # %entry
+; NOTAIX-NEXT: dssall
+; NOTAIX-NEXT: blr
+entry:
+ tail call void @llvm.ppc.altivec.dssall()
+ ret void
+}
+
+declare void @llvm.ppc.altivec.dssall()
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