[PATCH] D102553: [X86] Use Skylake Server model for x86-64-v4 so we have full instruction coveage

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
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The x86-64-v4 generic cpu arch supports AVX512BW/DQ/CD/VLX which isn't covered by the Haswell model, use the SkylakeServer model instead which is a lot closer to what the arch represents.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D102553

Files:
  llvm/lib/Target/X86/X86.td


Index: llvm/lib/Target/X86/X86.td
===================================================================
--- llvm/lib/Target/X86/X86.td
+++ llvm/lib/Target/X86/X86.td
@@ -1437,7 +1437,7 @@
 def : ProcModel<"x86-64-v3", HaswellModel, ProcessorFeatures.X86_64V3Features,
                 ProcessorFeatures.HSWTuning>;
 // Close to the AVX-512 level implemented by Xeon Scalable Processors.
-def : ProcModel<"x86-64-v4", HaswellModel, ProcessorFeatures.X86_64V4Features,
+def : ProcModel<"x86-64-v4", SkylakeServerModel, ProcessorFeatures.X86_64V4Features,
                 ProcessorFeatures.SKXTuning>;
 
 //===----------------------------------------------------------------------===//


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