[llvm] d08909d - [NFC][X86][MCA] AMD Zen 3: add same-reg AVX XMM VPSUB{B,W,D,Q} tests

Roman Lebedev via llvm-commits llvm-commits at lists.llvm.org
Fri May 14 10:23:56 PDT 2021


Author: Roman Lebedev
Date: 2021-05-14T20:23:00+03:00
New Revision: d08909d1cb733e5536f736022c0725d97d156c95

URL: https://github.com/llvm/llvm-project/commit/d08909d1cb733e5536f736022c0725d97d156c95
DIFF: https://github.com/llvm/llvm-project/commit/d08909d1cb733e5536f736022c0725d97d156c95.diff

LOG: [NFC][X86][MCA] AMD Zen 3: add same-reg AVX XMM VPSUB{B,W,D,Q} tests

Added: 
    

Modified: 
    llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s

Removed: 
    


################################################################################
diff  --git a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
index 35192f02564b..109eda289e41 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
@@ -31,6 +31,26 @@ vpandn %xmm0, %xmm0, %xmm0
 vpandn %xmm1, %xmm0, %xmm0
 # LLVM-MCA-END
 
+# LLVM-MCA-BEGIN
+vpsubb %xmm0, %xmm0, %xmm0
+vpsubb %xmm1, %xmm0, %xmm0
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN
+vpsubw %xmm0, %xmm0, %xmm0
+vpsubw %xmm1, %xmm0, %xmm0
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN
+vpsubd %xmm0, %xmm0, %xmm0
+vpsubd %xmm1, %xmm0, %xmm0
+# LLVM-MCA-END
+
+# LLVM-MCA-BEGIN
+vpsubq %xmm0, %xmm0, %xmm0
+vpsubq %xmm1, %xmm0, %xmm0
+# LLVM-MCA-END
+
 # CHECK:      [0] Code Region
 
 # CHECK:      Iterations:        10000
@@ -576,3 +596,367 @@ vpandn %xmm1, %xmm0, %xmm0
 # CHECK-NEXT: 0.     2     0.0    0.0    1.0       vpandn	%xmm0, %xmm0, %xmm0
 # CHECK-NEXT: 1.     2     1.0    1.0    0.0       vpandn	%xmm1, %xmm0, %xmm0
 # CHECK-NEXT:        2     0.5    0.5    0.5       <total>
+
+# CHECK:      [6] Code Region
+
+# CHECK:      Iterations:        10000
+# CHECK-NEXT: Instructions:      20000
+# CHECK-NEXT: Total Cycles:      20003
+# CHECK-NEXT: Total uOps:        20000
+
+# CHECK:      Dispatch Width:    6
+# CHECK-NEXT: uOps Per Cycle:    1.00
+# CHECK-NEXT: IPC:               1.00
+# CHECK-NEXT: Block RThroughput: 0.5
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.25                        vpsubb	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  1      1     0.25                        vpsubb	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Register File statistics:
+# CHECK-NEXT: Total number of mappings created:    20000
+# CHECK-NEXT: Max number of mappings used:         66
+
+# CHECK:      *  Register File #1 -- Zn3FpPRF:
+# CHECK-NEXT:    Number of physical registers:     160
+# CHECK-NEXT:    Total number of mappings created: 20000
+# CHECK-NEXT:    Max number of mappings used:      66
+
+# CHECK:      *  Register File #2 -- Zn3IntegerPRF:
+# CHECK-NEXT:    Number of physical registers:     192
+# CHECK-NEXT:    Total number of mappings created: 0
+# CHECK-NEXT:    Max number of mappings used:      0
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - Zn3AGU0
+# CHECK-NEXT: [1]   - Zn3AGU1
+# CHECK-NEXT: [2]   - Zn3AGU2
+# CHECK-NEXT: [3]   - Zn3ALU0
+# CHECK-NEXT: [4]   - Zn3ALU1
+# CHECK-NEXT: [5]   - Zn3ALU2
+# CHECK-NEXT: [6]   - Zn3ALU3
+# CHECK-NEXT: [7]   - Zn3BRU1
+# CHECK-NEXT: [8]   - Zn3FPP0
+# CHECK-NEXT: [9]   - Zn3FPP1
+# CHECK-NEXT: [10]  - Zn3FPP2
+# CHECK-NEXT: [11]  - Zn3FPP3
+# CHECK-NEXT: [12.0] - Zn3FPP45
+# CHECK-NEXT: [12.1] - Zn3FPP45
+# CHECK-NEXT: [13]  - Zn3FPSt
+# CHECK-NEXT: [14.0] - Zn3LSU
+# CHECK-NEXT: [14.1] - Zn3LSU
+# CHECK-NEXT: [14.2] - Zn3LSU
+# CHECK-NEXT: [15.0] - Zn3Load
+# CHECK-NEXT: [15.1] - Zn3Load
+# CHECK-NEXT: [15.2] - Zn3Load
+# CHECK-NEXT: [16.0] - Zn3Store
+# CHECK-NEXT: [16.1] - Zn3Store
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50   0.50   0.50   0.50    -      -      -      -      -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
+# CHECK-NEXT:  -      -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -     vpsubb	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -      -     vpsubb	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Timeline view:
+# CHECK-NEXT: Index     0123456
+
+# CHECK:      [0,0]     DeER ..   vpsubb	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [0,1]     D=eER..   vpsubb	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT: [1,0]     D==eER.   vpsubb	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [1,1]     D===eER   vpsubb	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     2     2.0    0.5    0.0       vpsubb	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1.     2     3.0    0.0    0.0       vpsubb	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT:        2     2.5    0.3    0.0       <total>
+
+# CHECK:      [7] Code Region
+
+# CHECK:      Iterations:        10000
+# CHECK-NEXT: Instructions:      20000
+# CHECK-NEXT: Total Cycles:      20003
+# CHECK-NEXT: Total uOps:        20000
+
+# CHECK:      Dispatch Width:    6
+# CHECK-NEXT: uOps Per Cycle:    1.00
+# CHECK-NEXT: IPC:               1.00
+# CHECK-NEXT: Block RThroughput: 0.5
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.25                        vpsubw	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  1      1     0.25                        vpsubw	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Register File statistics:
+# CHECK-NEXT: Total number of mappings created:    20000
+# CHECK-NEXT: Max number of mappings used:         66
+
+# CHECK:      *  Register File #1 -- Zn3FpPRF:
+# CHECK-NEXT:    Number of physical registers:     160
+# CHECK-NEXT:    Total number of mappings created: 20000
+# CHECK-NEXT:    Max number of mappings used:      66
+
+# CHECK:      *  Register File #2 -- Zn3IntegerPRF:
+# CHECK-NEXT:    Number of physical registers:     192
+# CHECK-NEXT:    Total number of mappings created: 0
+# CHECK-NEXT:    Max number of mappings used:      0
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - Zn3AGU0
+# CHECK-NEXT: [1]   - Zn3AGU1
+# CHECK-NEXT: [2]   - Zn3AGU2
+# CHECK-NEXT: [3]   - Zn3ALU0
+# CHECK-NEXT: [4]   - Zn3ALU1
+# CHECK-NEXT: [5]   - Zn3ALU2
+# CHECK-NEXT: [6]   - Zn3ALU3
+# CHECK-NEXT: [7]   - Zn3BRU1
+# CHECK-NEXT: [8]   - Zn3FPP0
+# CHECK-NEXT: [9]   - Zn3FPP1
+# CHECK-NEXT: [10]  - Zn3FPP2
+# CHECK-NEXT: [11]  - Zn3FPP3
+# CHECK-NEXT: [12.0] - Zn3FPP45
+# CHECK-NEXT: [12.1] - Zn3FPP45
+# CHECK-NEXT: [13]  - Zn3FPSt
+# CHECK-NEXT: [14.0] - Zn3LSU
+# CHECK-NEXT: [14.1] - Zn3LSU
+# CHECK-NEXT: [14.2] - Zn3LSU
+# CHECK-NEXT: [15.0] - Zn3Load
+# CHECK-NEXT: [15.1] - Zn3Load
+# CHECK-NEXT: [15.2] - Zn3Load
+# CHECK-NEXT: [16.0] - Zn3Store
+# CHECK-NEXT: [16.1] - Zn3Store
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50   0.50   0.50   0.50    -      -      -      -      -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
+# CHECK-NEXT:  -      -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -     vpsubw	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -      -     vpsubw	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Timeline view:
+# CHECK-NEXT: Index     0123456
+
+# CHECK:      [0,0]     DeER ..   vpsubw	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [0,1]     D=eER..   vpsubw	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT: [1,0]     D==eER.   vpsubw	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [1,1]     D===eER   vpsubw	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     2     2.0    0.5    0.0       vpsubw	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1.     2     3.0    0.0    0.0       vpsubw	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT:        2     2.5    0.3    0.0       <total>
+
+# CHECK:      [8] Code Region
+
+# CHECK:      Iterations:        10000
+# CHECK-NEXT: Instructions:      20000
+# CHECK-NEXT: Total Cycles:      20003
+# CHECK-NEXT: Total uOps:        20000
+
+# CHECK:      Dispatch Width:    6
+# CHECK-NEXT: uOps Per Cycle:    1.00
+# CHECK-NEXT: IPC:               1.00
+# CHECK-NEXT: Block RThroughput: 0.5
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.25                        vpsubd	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  1      1     0.25                        vpsubd	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Register File statistics:
+# CHECK-NEXT: Total number of mappings created:    20000
+# CHECK-NEXT: Max number of mappings used:         66
+
+# CHECK:      *  Register File #1 -- Zn3FpPRF:
+# CHECK-NEXT:    Number of physical registers:     160
+# CHECK-NEXT:    Total number of mappings created: 20000
+# CHECK-NEXT:    Max number of mappings used:      66
+
+# CHECK:      *  Register File #2 -- Zn3IntegerPRF:
+# CHECK-NEXT:    Number of physical registers:     192
+# CHECK-NEXT:    Total number of mappings created: 0
+# CHECK-NEXT:    Max number of mappings used:      0
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - Zn3AGU0
+# CHECK-NEXT: [1]   - Zn3AGU1
+# CHECK-NEXT: [2]   - Zn3AGU2
+# CHECK-NEXT: [3]   - Zn3ALU0
+# CHECK-NEXT: [4]   - Zn3ALU1
+# CHECK-NEXT: [5]   - Zn3ALU2
+# CHECK-NEXT: [6]   - Zn3ALU3
+# CHECK-NEXT: [7]   - Zn3BRU1
+# CHECK-NEXT: [8]   - Zn3FPP0
+# CHECK-NEXT: [9]   - Zn3FPP1
+# CHECK-NEXT: [10]  - Zn3FPP2
+# CHECK-NEXT: [11]  - Zn3FPP3
+# CHECK-NEXT: [12.0] - Zn3FPP45
+# CHECK-NEXT: [12.1] - Zn3FPP45
+# CHECK-NEXT: [13]  - Zn3FPSt
+# CHECK-NEXT: [14.0] - Zn3LSU
+# CHECK-NEXT: [14.1] - Zn3LSU
+# CHECK-NEXT: [14.2] - Zn3LSU
+# CHECK-NEXT: [15.0] - Zn3Load
+# CHECK-NEXT: [15.1] - Zn3Load
+# CHECK-NEXT: [15.2] - Zn3Load
+# CHECK-NEXT: [16.0] - Zn3Store
+# CHECK-NEXT: [16.1] - Zn3Store
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50   0.50   0.50   0.50    -      -      -      -      -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
+# CHECK-NEXT:  -      -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -     vpsubd	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -      -     vpsubd	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Timeline view:
+# CHECK-NEXT: Index     0123456
+
+# CHECK:      [0,0]     DeER ..   vpsubd	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [0,1]     D=eER..   vpsubd	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT: [1,0]     D==eER.   vpsubd	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [1,1]     D===eER   vpsubd	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     2     2.0    0.5    0.0       vpsubd	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1.     2     3.0    0.0    0.0       vpsubd	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT:        2     2.5    0.3    0.0       <total>
+
+# CHECK:      [9] Code Region
+
+# CHECK:      Iterations:        10000
+# CHECK-NEXT: Instructions:      20000
+# CHECK-NEXT: Total Cycles:      20003
+# CHECK-NEXT: Total uOps:        20000
+
+# CHECK:      Dispatch Width:    6
+# CHECK-NEXT: uOps Per Cycle:    1.00
+# CHECK-NEXT: IPC:               1.00
+# CHECK-NEXT: Block RThroughput: 0.5
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects (U)
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.25                        vpsubq	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  1      1     0.25                        vpsubq	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Register File statistics:
+# CHECK-NEXT: Total number of mappings created:    20000
+# CHECK-NEXT: Max number of mappings used:         66
+
+# CHECK:      *  Register File #1 -- Zn3FpPRF:
+# CHECK-NEXT:    Number of physical registers:     160
+# CHECK-NEXT:    Total number of mappings created: 20000
+# CHECK-NEXT:    Max number of mappings used:      66
+
+# CHECK:      *  Register File #2 -- Zn3IntegerPRF:
+# CHECK-NEXT:    Number of physical registers:     192
+# CHECK-NEXT:    Total number of mappings created: 0
+# CHECK-NEXT:    Max number of mappings used:      0
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - Zn3AGU0
+# CHECK-NEXT: [1]   - Zn3AGU1
+# CHECK-NEXT: [2]   - Zn3AGU2
+# CHECK-NEXT: [3]   - Zn3ALU0
+# CHECK-NEXT: [4]   - Zn3ALU1
+# CHECK-NEXT: [5]   - Zn3ALU2
+# CHECK-NEXT: [6]   - Zn3ALU3
+# CHECK-NEXT: [7]   - Zn3BRU1
+# CHECK-NEXT: [8]   - Zn3FPP0
+# CHECK-NEXT: [9]   - Zn3FPP1
+# CHECK-NEXT: [10]  - Zn3FPP2
+# CHECK-NEXT: [11]  - Zn3FPP3
+# CHECK-NEXT: [12.0] - Zn3FPP45
+# CHECK-NEXT: [12.1] - Zn3FPP45
+# CHECK-NEXT: [13]  - Zn3FPSt
+# CHECK-NEXT: [14.0] - Zn3LSU
+# CHECK-NEXT: [14.1] - Zn3LSU
+# CHECK-NEXT: [14.2] - Zn3LSU
+# CHECK-NEXT: [15.0] - Zn3Load
+# CHECK-NEXT: [15.1] - Zn3Load
+# CHECK-NEXT: [15.2] - Zn3Load
+# CHECK-NEXT: [16.0] - Zn3Store
+# CHECK-NEXT: [16.1] - Zn3Store
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50   0.50   0.50   0.50    -      -      -      -      -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12.0] [12.1] [13]   [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
+# CHECK-NEXT:  -      -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -     vpsubq	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT:  -      -      -      -      -      -      -      -     0.50    -     0.50    -      -      -      -      -      -      -      -      -      -      -      -     vpsubq	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Timeline view:
+# CHECK-NEXT: Index     0123456
+
+# CHECK:      [0,0]     DeER ..   vpsubq	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [0,1]     D=eER..   vpsubq	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT: [1,0]     D==eER.   vpsubq	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [1,1]     D===eER   vpsubq	%xmm1, %xmm0, %xmm0
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     2     2.0    0.5    0.0       vpsubq	%xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1.     2     3.0    0.0    0.0       vpsubq	%xmm1, %xmm0, %xmm0
+# CHECK-NEXT:        2     2.5    0.3    0.0       <total>


        


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