[llvm] 44c2b4f - [X86] AMD Zen 3: same-reg AVX XMM VPANDN is a zero-cycle(!) dep-breaking zero-idiom
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Fri May 14 10:23:50 PDT 2021
Author: Roman Lebedev
Date: 2021-05-14T20:23:00+03:00
New Revision: 44c2b4fe91de00bce63ea4f0fbe47ce612cae69a
URL: https://github.com/llvm/llvm-project/commit/44c2b4fe91de00bce63ea4f0fbe47ce612cae69a
DIFF: https://github.com/llvm/llvm-project/commit/44c2b4fe91de00bce63ea4f0fbe47ce612cae69a.diff
LOG: [X86] AMD Zen 3: same-reg AVX XMM VPANDN is a zero-cycle(!) dep-breaking zero-idiom
As confirmed by exegesis measurements, and ref docs.
Added:
Modified:
llvm/lib/Target/X86/X86ScheduleZnver3.td
llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver3.td b/llvm/lib/Target/X86/X86ScheduleZnver3.td
index 956a7ba14c13..97aaccf2a9f4 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver3.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver3.td
@@ -1549,8 +1549,8 @@ def Zn3WriteVZeroIdiomLogicX : SchedWriteVariant<[
SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [Zn3WriteZeroLatency]>,
SchedVar<NoSchedPred, [WriteVecLogicX]>
]>;
-// NOTE: PXORrr is not zero-cycle!
-def : InstRW<[Zn3WriteVZeroIdiomLogicX], (instrs VPXORrr)>;
+// NOTE: PXORrr,PANDNrr are not zero-cycle!
+def : InstRW<[Zn3WriteVZeroIdiomLogicX], (instrs VPXORrr, VPANDNrr)>;
def Zn3WriteVZeroIdiomLogicY : SchedWriteVariant<[
SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [Zn3WriteZeroLatency]>,
@@ -1583,7 +1583,8 @@ def : IsZeroIdiomFunction<[
VANDNPSrr, VANDNPDrr,
// int variants.
- VPXORrr
+ VPXORrr,
+ VPANDNrr
], ZeroIdiomPredicate>,
// AVX YMM Zero-idioms.
diff --git a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
index 0d86cd7a618f..35192f02564b 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
@@ -490,13 +490,13 @@ vpandn %xmm1, %xmm0, %xmm0
# CHECK: Iterations: 10000
# CHECK-NEXT: Instructions: 20000
-# CHECK-NEXT: Total Cycles: 20003
+# CHECK-NEXT: Total Cycles: 3337
# CHECK-NEXT: Total uOps: 20000
# CHECK: Dispatch Width: 6
-# CHECK-NEXT: uOps Per Cycle: 1.00
-# CHECK-NEXT: IPC: 1.00
-# CHECK-NEXT: Block RThroughput: 0.5
+# CHECK-NEXT: uOps Per Cycle: 5.99
+# CHECK-NEXT: IPC: 5.99
+# CHECK-NEXT: Block RThroughput: 0.3
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
@@ -507,17 +507,17 @@ vpandn %xmm1, %xmm0, %xmm0
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
-# CHECK-NEXT: 1 1 0.25 vpandn %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1 0 0.17 vpandn %xmm0, %xmm0, %xmm0
# CHECK-NEXT: 1 1 0.25 vpandn %xmm1, %xmm0, %xmm0
# CHECK: Register File statistics:
-# CHECK-NEXT: Total number of mappings created: 20000
-# CHECK-NEXT: Max number of mappings used: 66
+# CHECK-NEXT: Total number of mappings created: 10000
+# CHECK-NEXT: Max number of mappings used: 9
# CHECK: * Register File #1 -- Zn3FpPRF:
# CHECK-NEXT: Number of physical registers: 160
-# CHECK-NEXT: Total number of mappings created: 20000
-# CHECK-NEXT: Max number of mappings used: 66
+# CHECK-NEXT: Total number of mappings created: 10000
+# CHECK-NEXT: Max number of mappings used: 9
# CHECK: * Register File #2 -- Zn3IntegerPRF:
# CHECK-NEXT: Number of physical registers: 192
@@ -551,20 +551,20 @@ vpandn %xmm1, %xmm0, %xmm0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - - - - - - - - - - -
+# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
-# CHECK-NEXT: - - - - - - - - - 0.50 - 0.50 - - - - - - - - - - - vpandn %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: - - - - - - - - 0.50 - 0.50 - - - - - - - - - - - - vpandn %xmm1, %xmm0, %xmm0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - vpandn %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - vpandn %xmm1, %xmm0, %xmm0
# CHECK: Timeline view:
-# CHECK-NEXT: Index 0123456
+# CHECK-NEXT: Index 0123
-# CHECK: [0,0] DeER .. vpandn %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: [0,1] D=eER.. vpandn %xmm1, %xmm0, %xmm0
-# CHECK-NEXT: [1,0] D==eER. vpandn %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: [1,1] D===eER vpandn %xmm1, %xmm0, %xmm0
+# CHECK: [0,0] DR . vpandn %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [0,1] DeER vpandn %xmm1, %xmm0, %xmm0
+# CHECK-NEXT: [1,0] D--R vpandn %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [1,1] DeER vpandn %xmm1, %xmm0, %xmm0
# CHECK: Average Wait times (based on the timeline view):
# CHECK-NEXT: [0]: Executions
@@ -573,6 +573,6 @@ vpandn %xmm1, %xmm0, %xmm0
# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
# CHECK: [0] [1] [2] [3]
-# CHECK-NEXT: 0. 2 2.0 0.5 0.0 vpandn %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: 1. 2 3.0 0.0 0.0 vpandn %xmm1, %xmm0, %xmm0
-# CHECK-NEXT: 2 2.5 0.3 0.0 <total>
+# CHECK-NEXT: 0. 2 0.0 0.0 1.0 vpandn %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1. 2 1.0 1.0 0.0 vpandn %xmm1, %xmm0, %xmm0
+# CHECK-NEXT: 2 0.5 0.5 0.5 <total>
More information about the llvm-commits
mailing list