[llvm] 5ed56a8 - [X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI.
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Fri May 14 03:14:30 PDT 2021
Author: Simon Pilgrim
Date: 2021-05-14T11:14:18+01:00
New Revision: 5ed56a821c0622869739a3ae752eea97a1ee1f48
URL: https://github.com/llvm/llvm-project/commit/5ed56a821c0622869739a3ae752eea97a1ee1f48
DIFF: https://github.com/llvm/llvm-project/commit/5ed56a821c0622869739a3ae752eea97a1ee1f48.diff
LOG: [X86] Try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI.
Added:
Modified:
llvm/lib/Target/X86/X86CallFrameOptimization.cpp
llvm/lib/Target/X86/X86CmovConversion.cpp
llvm/lib/Target/X86/X86FloatingPoint.cpp
llvm/lib/Target/X86/X86FrameLowering.cpp
llvm/lib/Target/X86/X86OptimizeLEAs.cpp
llvm/lib/Target/X86/X86PadShortFunction.cpp
llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
llvm/lib/Target/X86/X86WinAllocaExpander.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86CallFrameOptimization.cpp b/llvm/lib/Target/X86/X86CallFrameOptimization.cpp
index fae4e688c8b4..1fa559dcf2bd 100644
--- a/llvm/lib/Target/X86/X86CallFrameOptimization.cpp
+++ b/llvm/lib/Target/X86/X86CallFrameOptimization.cpp
@@ -499,7 +499,7 @@ void X86CallFrameOptimization::adjustCallSequence(MachineFunction &MF,
MachineBasicBlock &MBB = *(FrameSetup->getParent());
TII->setFrameAdjustment(*FrameSetup, Context.ExpectedDist);
- DebugLoc DL = FrameSetup->getDebugLoc();
+ const DebugLoc &DL = FrameSetup->getDebugLoc();
bool Is64Bit = STI->is64Bit();
// Now, iterate through the vector in reverse order, and replace the store to
// stack with pushes. MOVmi/MOVmr doesn't have any defs, so no need to
diff --git a/llvm/lib/Target/X86/X86CmovConversion.cpp b/llvm/lib/Target/X86/X86CmovConversion.cpp
index a2de0dc08292..d58566c20215 100644
--- a/llvm/lib/Target/X86/X86CmovConversion.cpp
+++ b/llvm/lib/Target/X86/X86CmovConversion.cpp
@@ -650,7 +650,7 @@ void X86CmovConverterPass::convertCmovInstsToBranches(
MachineInstr &MI = *Group.front();
MachineInstr *LastCMOV = Group.back();
- DebugLoc DL = MI.getDebugLoc();
+ const DebugLoc &DL = MI.getDebugLoc();
X86::CondCode CC = X86::CondCode(X86::getCondFromCMov(MI));
X86::CondCode OppCC = X86::GetOppositeBranchCondition(CC);
diff --git a/llvm/lib/Target/X86/X86FloatingPoint.cpp b/llvm/lib/Target/X86/X86FloatingPoint.cpp
index b0f2f23f8548..90c34272cec8 100644
--- a/llvm/lib/Target/X86/X86FloatingPoint.cpp
+++ b/llvm/lib/Target/X86/X86FloatingPoint.cpp
@@ -1297,7 +1297,7 @@ void FPS::handleTwoArgFP(MachineBasicBlock::iterator &I) {
unsigned Op1 = getFPReg(MI.getOperand(NumOperands - 1));
bool KillsOp0 = MI.killsRegister(X86::FP0 + Op0);
bool KillsOp1 = MI.killsRegister(X86::FP0 + Op1);
- DebugLoc dl = MI.getDebugLoc();
+ const DebugLoc &dl = MI.getDebugLoc();
unsigned TOS = getStackEntry(0);
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index ed9d3ea0d6be..78b37480dbc0 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -2508,7 +2508,7 @@ void X86FrameLowering::emitCatchRetReturnValue(MachineBasicBlock &MBB,
assert(!isAsynchronousEHPersonality(classifyEHPersonality(
MBB.getParent()->getFunction().getPersonalityFn())) &&
"SEH should not use CATCHRET");
- DebugLoc DL = CatchRet->getDebugLoc();
+ const DebugLoc &DL = CatchRet->getDebugLoc();
MachineBasicBlock *CatchRetTarget = CatchRet->getOperand(0).getMBB();
// Fill EAX/RAX with the address of the target block.
@@ -3160,7 +3160,7 @@ eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
bool reserveCallFrame = hasReservedCallFrame(MF);
unsigned Opcode = I->getOpcode();
bool isDestroy = Opcode == TII.getCallFrameDestroyOpcode();
- DebugLoc DL = I->getDebugLoc();
+ const DebugLoc &DL = I->getDebugLoc();
uint64_t Amount = TII.getFrameSize(*I);
uint64_t InternalAmt = (isDestroy || Amount) ? TII.getFrameAdjustment(*I) : 0;
I = MBB.erase(I);
diff --git a/llvm/lib/Target/X86/X86OptimizeLEAs.cpp b/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
index ab4d2bd05772..ef60fd87f4cb 100644
--- a/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
+++ b/llvm/lib/Target/X86/X86OptimizeLEAs.cpp
@@ -598,7 +598,7 @@ MachineInstr *X86OptimizeLEAPass::replaceDebugValue(MachineInstr &MI,
// Replace DBG_VALUE instruction with modified version.
MachineBasicBlock *MBB = MI.getParent();
- DebugLoc DL = MI.getDebugLoc();
+ const DebugLoc &DL = MI.getDebugLoc();
bool IsIndirect = MI.isIndirectDebugValue();
const MDNode *Var = MI.getDebugVariable();
unsigned Opcode = MI.isNonListDebugValue() ? TargetOpcode::DBG_VALUE
diff --git a/llvm/lib/Target/X86/X86PadShortFunction.cpp b/llvm/lib/Target/X86/X86PadShortFunction.cpp
index ec81b07f9e5f..e10dab72078d 100644
--- a/llvm/lib/Target/X86/X86PadShortFunction.cpp
+++ b/llvm/lib/Target/X86/X86PadShortFunction.cpp
@@ -222,7 +222,7 @@ bool PadShortFunc::cyclesUntilReturn(MachineBasicBlock *MBB,
void PadShortFunc::addPadding(MachineBasicBlock *MBB,
MachineBasicBlock::iterator &MBBI,
unsigned int NOOPsToAdd) {
- DebugLoc DL = MBBI->getDebugLoc();
+ const DebugLoc &DL = MBBI->getDebugLoc();
unsigned IssueWidth = TSM.getIssueWidth();
for (unsigned i = 0, e = IssueWidth * NOOPsToAdd; i != e; ++i)
diff --git a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
index aa73d4bce65a..9acf0b719b03 100644
--- a/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
+++ b/llvm/lib/Target/X86/X86SpeculativeLoadHardening.cpp
@@ -1574,7 +1574,7 @@ void X86SpeculativeLoadHardeningPass::hardenLoadAddr(
MachineInstr &MI, MachineOperand &BaseMO, MachineOperand &IndexMO,
SmallDenseMap<unsigned, unsigned, 32> &AddrRegToHardenedReg) {
MachineBasicBlock &MBB = *MI.getParent();
- DebugLoc Loc = MI.getDebugLoc();
+ const DebugLoc &Loc = MI.getDebugLoc();
// Check if EFLAGS are alive by seeing if there is a def of them or they
// live-in, and then seeing if that def is in turn used.
@@ -1959,7 +1959,7 @@ unsigned X86SpeculativeLoadHardeningPass::hardenValueInRegister(
/// Returns the newly hardened register.
unsigned X86SpeculativeLoadHardeningPass::hardenPostLoad(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
- DebugLoc Loc = MI.getDebugLoc();
+ const DebugLoc &Loc = MI.getDebugLoc();
auto &DefOp = MI.getOperand(0);
Register OldDefReg = DefOp.getReg();
@@ -2010,7 +2010,7 @@ unsigned X86SpeculativeLoadHardeningPass::hardenPostLoad(MachineInstr &MI) {
/// predicate state from the stack pointer and continue to harden loads.
void X86SpeculativeLoadHardeningPass::hardenReturnInstr(MachineInstr &MI) {
MachineBasicBlock &MBB = *MI.getParent();
- DebugLoc Loc = MI.getDebugLoc();
+ const DebugLoc &Loc = MI.getDebugLoc();
auto InsertPt = MI.getIterator();
if (FenceCallAndRet)
@@ -2059,7 +2059,7 @@ void X86SpeculativeLoadHardeningPass::tracePredStateThroughCall(
MachineBasicBlock &MBB = *MI.getParent();
MachineFunction &MF = *MBB.getParent();
auto InsertPt = MI.getIterator();
- DebugLoc Loc = MI.getDebugLoc();
+ const DebugLoc &Loc = MI.getDebugLoc();
if (FenceCallAndRet) {
if (MI.isReturn())
diff --git a/llvm/lib/Target/X86/X86WinAllocaExpander.cpp b/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
index 72593afb2258..9ada0a8dd412 100644
--- a/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
+++ b/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
@@ -196,7 +196,7 @@ static unsigned getSubOpcode(bool Is64Bit, int64_t Amount) {
}
void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) {
- DebugLoc DL = MI->getDebugLoc();
+ const DebugLoc &DL = MI->getDebugLoc();
MachineBasicBlock *MBB = MI->getParent();
MachineBasicBlock::iterator I = *MI;
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