[PATCH] D95443: IR/AArch64/X86: add "swifttailcc" calling convention.

[Tim Northover via Phabricator via llvm-commits]

t.p.northover marked an inline comment as done.
t.p.northover added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64FrameLowering.cpp:2383
         !RPI.isScalable() && RPI.Type != RegPairInfo::FPR128 &&
-        !RPI.isPaired()) {
+        !RPI.isPaired() && ByteOffset % 16 != 0) {
       ByteOffset += 8 * StackFillDir;
----------------
paquette wrote:
> The assert in the original code checks that `ByteOffset % 16 == 0`, why did that change here?
If you're asking why the direction of the test changed, it's because the assert was after `ByteOffset` had been incremented by +/-8 in this block.

The reason the check's needed at all now is that there are multiple potential sources of misalignment (odd # of CSRs, and the new context store), and they might or might not combine to realign the stack again.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95443/new/

https://reviews.llvm.org/D95443