[llvm] 26c1bff - [X86] AMD Zen 3: same-reg AVX XMM VXORPS is a zero-cycle(!) dep-breaking zero-idiom
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Fri May 14 01:56:41 PDT 2021
Author: Roman Lebedev
Date: 2021-05-14T11:56:06+03:00
New Revision: 26c1bffe675747d90513033f773c0aef63172608
URL: https://github.com/llvm/llvm-project/commit/26c1bffe675747d90513033f773c0aef63172608
DIFF: https://github.com/llvm/llvm-project/commit/26c1bffe675747d90513033f773c0aef63172608.diff
LOG: [X86] AMD Zen 3: same-reg AVX XMM VXORPS is a zero-cycle(!) dep-breaking zero-idiom
Unlike it's legacy SSE XMM XORPS version, which measures as being 1-cycle,
this one is certainly a zero-cycle instruction, in addition to both of them
being dependency breaking.
As confirmed by exegesis measurements, and ref docs.
Added:
Modified:
llvm/lib/Target/X86/X86ScheduleZnver3.td
llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver3.td b/llvm/lib/Target/X86/X86ScheduleZnver3.td
index 82233b6dda97a..4202d4294f683 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver3.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver3.td
@@ -1530,6 +1530,13 @@ def : InstRW<[Zn3WriteZeroIdiomEFLAGS], (instrs CMP8rr, CMP8rr_REV,
CMP32rr, CMP32rr_REV,
CMP64rr, CMP64rr_REV)>;
+def Zn3WriteFZeroIdiom : SchedWriteVariant<[
+ SchedVar<MCSchedPredicate<ZeroIdiomPredicate>, [Zn3WriteZeroLatency]>,
+ SchedVar<NoSchedPred, [WriteFLogic]>
+]>;
+// NOTE: XORPSrr is not zero-cycle!
+def : InstRW<[Zn3WriteFZeroIdiom], (instrs VXORPSrr)>;
+
def : IsZeroIdiomFunction<[
// GPR Zero-idioms.
DepBreakingClass<[ XOR32rr, XOR32rr_REV,
@@ -1539,6 +1546,9 @@ def : IsZeroIdiomFunction<[
// SSE XMM Zero-idioms.
DepBreakingClass<[ XORPSrr ], ZeroIdiomPredicate>,
+
+ // AVX XMM Zero-idioms.
+ DepBreakingClass<[ VXORPSrr ], ZeroIdiomPredicate>,
]>;
def : IsDepBreakingFunction<[
diff --git a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
index 60b49336872c2..cd74a214501c1 100644
--- a/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
+++ b/llvm/test/tools/llvm-mca/X86/Znver3/zero-idioms-avx-xmm.s
@@ -10,13 +10,13 @@ vxorps %xmm1, %xmm0, %xmm0
# CHECK: Iterations: 10000
# CHECK-NEXT: Instructions: 20000
-# CHECK-NEXT: Total Cycles: 20003
+# CHECK-NEXT: Total Cycles: 3337
# CHECK-NEXT: Total uOps: 20000
# CHECK: Dispatch Width: 6
-# CHECK-NEXT: uOps Per Cycle: 1.00
-# CHECK-NEXT: IPC: 1.00
-# CHECK-NEXT: Block RThroughput: 0.5
+# CHECK-NEXT: uOps Per Cycle: 5.99
+# CHECK-NEXT: IPC: 5.99
+# CHECK-NEXT: Block RThroughput: 0.3
# CHECK: Instruction Info:
# CHECK-NEXT: [1]: #uOps
@@ -27,17 +27,17 @@ vxorps %xmm1, %xmm0, %xmm0
# CHECK-NEXT: [6]: HasSideEffects (U)
# CHECK: [1] [2] [3] [4] [5] [6] Instructions:
-# CHECK-NEXT: 1 1 0.25 vxorps %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1 0 0.17 vxorps %xmm0, %xmm0, %xmm0
# CHECK-NEXT: 1 1 0.25 vxorps %xmm1, %xmm0, %xmm0
# CHECK: Register File statistics:
-# CHECK-NEXT: Total number of mappings created: 20000
-# CHECK-NEXT: Max number of mappings used: 66
+# CHECK-NEXT: Total number of mappings created: 10000
+# CHECK-NEXT: Max number of mappings used: 9
# CHECK: * Register File #1 -- Zn3FpPRF:
# CHECK-NEXT: Number of physical registers: 160
-# CHECK-NEXT: Total number of mappings created: 20000
-# CHECK-NEXT: Max number of mappings used: 66
+# CHECK-NEXT: Total number of mappings created: 10000
+# CHECK-NEXT: Max number of mappings used: 9
# CHECK: * Register File #2 -- Zn3IntegerPRF:
# CHECK-NEXT: Number of physical registers: 192
@@ -71,20 +71,20 @@ vxorps %xmm1, %xmm0, %xmm0
# CHECK: Resource pressure per iteration:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1]
-# CHECK-NEXT: - - - - - - - - 0.50 0.50 0.50 0.50 - - - - - - - - - - -
+# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - -
# CHECK: Resource pressure by instruction:
# CHECK-NEXT: [0] [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12.0] [12.1] [13] [14.0] [14.1] [14.2] [15.0] [15.1] [15.2] [16.0] [16.1] Instructions:
-# CHECK-NEXT: - - - - - - - - - 0.50 - 0.50 - - - - - - - - - - - vxorps %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: - - - - - - - - 0.50 - 0.50 - - - - - - - - - - - - vxorps %xmm1, %xmm0, %xmm0
+# CHECK-NEXT: - - - - - - - - - - - - - - - - - - - - - - - vxorps %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: - - - - - - - - 0.25 0.25 0.25 0.25 - - - - - - - - - - - vxorps %xmm1, %xmm0, %xmm0
# CHECK: Timeline view:
-# CHECK-NEXT: Index 0123456
+# CHECK-NEXT: Index 0123
-# CHECK: [0,0] DeER .. vxorps %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: [0,1] D=eER.. vxorps %xmm1, %xmm0, %xmm0
-# CHECK-NEXT: [1,0] D==eER. vxorps %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: [1,1] D===eER vxorps %xmm1, %xmm0, %xmm0
+# CHECK: [0,0] DR . vxorps %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [0,1] DeER vxorps %xmm1, %xmm0, %xmm0
+# CHECK-NEXT: [1,0] D--R vxorps %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: [1,1] DeER vxorps %xmm1, %xmm0, %xmm0
# CHECK: Average Wait times (based on the timeline view):
# CHECK-NEXT: [0]: Executions
@@ -93,6 +93,6 @@ vxorps %xmm1, %xmm0, %xmm0
# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
# CHECK: [0] [1] [2] [3]
-# CHECK-NEXT: 0. 2 2.0 0.5 0.0 vxorps %xmm0, %xmm0, %xmm0
-# CHECK-NEXT: 1. 2 3.0 0.0 0.0 vxorps %xmm1, %xmm0, %xmm0
-# CHECK-NEXT: 2 2.5 0.3 0.0 <total>
+# CHECK-NEXT: 0. 2 0.0 0.0 1.0 vxorps %xmm0, %xmm0, %xmm0
+# CHECK-NEXT: 1. 2 1.0 1.0 0.0 vxorps %xmm1, %xmm0, %xmm0
+# CHECK-NEXT: 2 0.5 0.5 0.5 <total>
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