[PATCH] D102111: [AMDGPU] Update SCC defs to VCC when uses are changed to VCC
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 13 18:22:31 PDT 2021
arsenm accepted this revision.
arsenm added a comment.
This revision is now accepted and ready to land.
This isn't great but I also don't think it's worth putting real effort into improving SIFixSGPRCopies at this point
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Comment at: llvm/test/CodeGen/AMDGPU/urem-change-scc-to-scc.ll:12
+ %0 = load i64, i64* undef, align 8
+ %rem = urem i64 %0, 2147483563
+ store i64 %rem, i64* undef, align 8
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This isn't particularly enlightening. Something in the giant urem expansion triggered this. Can you come up with some IR approximating the situation in the middle?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D102111/new/
https://reviews.llvm.org/D102111
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