[PATCH] D102246: [SampleFDO] New hierarchical discriminator for Flow Sensitive SampleFDO

[Rong Xu via Phabricator via llvm-commits]

xur marked an inline comment as done.
xur added inline comments.


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Comment at: llvm/include/llvm/IR/DebugInfoMetadata.h:1771
+  /// (i.e. zero out the B-th and above bits for D (B is 0-based and inclusive).
+  // Example: an input of (0x1FF, 7) returns 0xFF.
+  static unsigned getMaskedDiscriminator(unsigned D, unsigned B) {
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xur wrote:
> hoy wrote:
> > xur wrote:
> > > wmi wrote:
> > > > If the first bit is the 0th bit, the 1 in 0x1FF is in the 8th bit and why input B = 7 can clear it?
> > > The comment is not accurate. It should be "Zero out the (B+1)-th and above bits for D. 
> > Looks like B == 0 is a special case, can you please update the comment for that too?
> Thanks. Will update this.
Think again, I'll remove the special case of B==0.  Currently there is not caller with B==0.


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  https://reviews.llvm.org/D102246/new/

https://reviews.llvm.org/D102246