[PATCH] D98101: [RISCV] Enable the LocalStackSlotAllocation pass support

[Alex Bradbury via Phabricator via llvm-commits]

asb added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:300
+// served by a base register other than FP or SP.
+// Used by LocalStackSlotAllocation to determine which frame index references it
+// should create new base registers for.
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StephenFan wrote:
> asb wrote:
> > I think this sentence needs rewriting - I can't quite follow it.
> emm, This sentence is copied from TargetRegisterInfo.h. It means that, For RISCV, if a frame index operand has a Offset that out-of-range 12 bits, this function will return true to indicate this frame index operand needs a frame base register.
Yes that was my bad - the sentence does indeed make sense as written.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D98101/new/

https://reviews.llvm.org/D98101