[llvm] 107d19e - Revert "[SimpleLoopUnswitch] Port partially invariant unswitch from LoopUnswitch to SimpleLoopUnswitch"
Jingu Kang via llvm-commits
llvm-commits at lists.llvm.org
Thu May 13 00:41:43 PDT 2021
Author: Jingu Kang
Date: 2021-05-13T08:40:49+01:00
New Revision: 107d19eb017ff6734986af077eb2e9f6600114a9
URL: https://github.com/llvm/llvm-project/commit/107d19eb017ff6734986af077eb2e9f6600114a9
DIFF: https://github.com/llvm/llvm-project/commit/107d19eb017ff6734986af077eb2e9f6600114a9.diff
LOG: Revert "[SimpleLoopUnswitch] Port partially invariant unswitch from LoopUnswitch to SimpleLoopUnswitch"
This reverts commit 88b259c01463c08ac2575b4432c07ea7751946b5.
It needs to fix below bugs.
https://bugs.llvm.org/show_bug.cgi?id=50279
https://bugs.llvm.org/show_bug.cgi?id=50302
Added:
Modified:
llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
Removed:
llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-mssa-threshold.ll
llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll
################################################################################
diff --git a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
index 665b32b4c9e6c..e9e5c92ecb395 100644
--- a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
+++ b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp
@@ -103,11 +103,6 @@ static cl::opt<bool> DropNonTrivialImplicitNullChecks(
cl::init(false), cl::Hidden,
cl::desc("If enabled, drop make.implicit metadata in unswitched implicit "
"null checks to save time analyzing if we can keep it."));
-static cl::opt<unsigned>
- MSSAThreshold("simple-loop-unswitch-memoryssa-threshold",
- cl::desc("Max number of memory uses to explore during "
- "partial unswitching analysis"),
- cl::init(100), cl::Hidden);
/// Collect all of the loop invariant input values transitively used by the
/// homogeneous instruction graph from a given root.
@@ -192,9 +187,8 @@ static bool areLoopExitPHIsLoopInvariant(Loop &L, BasicBlock &ExitingBB,
llvm_unreachable("Basic blocks should never be empty!");
}
-/// Copy a set of loop invariant values \p ToDuplicate and insert them at the
-/// end of \p BB and conditionally branch on the copied condition. We only
-/// branch on a single value.
+/// Insert code to test a set of loop invariant values, and conditionally branch
+/// on them.
static void buildPartialUnswitchConditionalBranch(BasicBlock &BB,
ArrayRef<Value *> Invariants,
bool Direction,
@@ -208,49 +202,6 @@ static void buildPartialUnswitchConditionalBranch(BasicBlock &BB,
Direction ? &NormalSucc : &UnswitchedSucc);
}
-/// Copy a set of loop invariant values, and conditionally branch on them.
-static void buildPartialInvariantUnswitchConditionalBranch(
- BasicBlock &BB, ArrayRef<Value *> ToDuplicate, bool Direction,
- BasicBlock &UnswitchedSucc, BasicBlock &NormalSucc, Loop &L,
- MemorySSAUpdater *MSSAU) {
- ValueToValueMapTy VMap;
- for (auto *Val : reverse(ToDuplicate)) {
- Instruction *Inst = cast<Instruction>(Val);
- Instruction *NewInst = Inst->clone();
- BB.getInstList().insert(BB.end(), NewInst);
- RemapInstruction(NewInst, VMap,
- RF_NoModuleLevelChanges | RF_IgnoreMissingLocals);
- VMap[Val] = NewInst;
-
- if (!MSSAU)
- continue;
-
- MemorySSA *MSSA = MSSAU->getMemorySSA();
- if (auto *MemUse =
- dyn_cast_or_null<MemoryUse>(MSSA->getMemoryAccess(Inst))) {
- auto *DefiningAccess = MemUse->getDefiningAccess();
- // Get the first defining access before the loop.
- while (L.contains(DefiningAccess->getBlock())) {
- // If the defining access is a MemoryPhi, get the incoming
- // value for the pre-header as defining access.
- if (auto *MemPhi = dyn_cast<MemoryPhi>(DefiningAccess))
- DefiningAccess =
- MemPhi->getIncomingValueForBlock(L.getLoopPreheader());
- else
- DefiningAccess = cast<MemoryDef>(DefiningAccess)->getDefiningAccess();
- }
- MSSAU->createMemoryAccessInBB(NewInst, DefiningAccess,
- NewInst->getParent(),
- MemorySSA::BeforeTerminator);
- }
- }
-
- IRBuilder<> IRB(&BB);
- Value *Cond = VMap[ToDuplicate[0]];
- IRB.CreateCondBr(Cond, Direction ? &UnswitchedSucc : &NormalSucc,
- Direction ? &NormalSucc : &UnswitchedSucc);
-}
-
/// Rewrite the PHI nodes in an unswitched loop exit basic block.
///
/// Requires that the loop exit and unswitched basic block are the same, and
@@ -2012,22 +1963,18 @@ void visitDomSubTree(DominatorTree &DT, BasicBlock *BB, CallableT Callable) {
static void unswitchNontrivialInvariants(
Loop &L, Instruction &TI, ArrayRef<Value *> Invariants,
- SmallVectorImpl<BasicBlock *> &ExitBlocks, IVConditionInfo &PartialIVInfo,
- DominatorTree &DT, LoopInfo &LI, AssumptionCache &AC,
- function_ref<void(bool, bool, ArrayRef<Loop *>)> UnswitchCB,
+ SmallVectorImpl<BasicBlock *> &ExitBlocks, DominatorTree &DT, LoopInfo &LI,
+ AssumptionCache &AC, function_ref<void(bool, ArrayRef<Loop *>)> UnswitchCB,
ScalarEvolution *SE, MemorySSAUpdater *MSSAU) {
auto *ParentBB = TI.getParent();
BranchInst *BI = dyn_cast<BranchInst>(&TI);
SwitchInst *SI = BI ? nullptr : cast<SwitchInst>(&TI);
// We can only unswitch switches, conditional branches with an invariant
- // condition, or combining invariant conditions with an instruction or
- // partially invariant instructions.
+ // condition, or combining invariant conditions with an instruction.
assert((SI || (BI && BI->isConditional())) &&
"Can only unswitch switches and conditional branch!");
- bool PartiallyInvariant = !PartialIVInfo.InstToDuplicate.empty();
- bool FullUnswitch =
- SI || (BI->getCondition() == Invariants[0] && !PartiallyInvariant);
+ bool FullUnswitch = SI || BI->getCondition() == Invariants[0];
if (FullUnswitch)
assert(Invariants.size() == 1 &&
"Cannot have other invariants with full unswitching!");
@@ -2041,24 +1988,20 @@ static void unswitchNontrivialInvariants(
// Constant and BBs tracking the cloned and continuing successor. When we are
// unswitching the entire condition, this can just be trivially chosen to
// unswitch towards `true`. However, when we are unswitching a set of
- // invariants combined with `and` or `or` or partially invariant instructions,
- // the combining operation determines the best direction to unswitch: we want
- // to unswitch the direction that will collapse the branch.
+ // invariants combined with `and` or `or`, the combining operation determines
+ // the best direction to unswitch: we want to unswitch the direction that will
+ // collapse the branch.
bool Direction = true;
int ClonedSucc = 0;
if (!FullUnswitch) {
Value *Cond = BI->getCondition();
(void)Cond;
- assert(((match(Cond, m_LogicalAnd()) ^ match(Cond, m_LogicalOr())) ||
- PartiallyInvariant) &&
- "Only `or`, `and`, an `select`, partially invariant instructions "
- "can combine invariants being unswitched.");
+ assert((match(Cond, m_LogicalAnd()) ^ match(Cond, m_LogicalOr())) &&
+ "Only `or`, `and`, an `select` instructions can combine "
+ "invariants being unswitched.");
if (!match(BI->getCondition(), m_LogicalOr())) {
- if (match(BI->getCondition(), m_LogicalAnd()) ||
- (PartiallyInvariant && !PartialIVInfo.KnownValue->isOneValue())) {
- Direction = false;
- ClonedSucc = 1;
- }
+ Direction = false;
+ ClonedSucc = 1;
}
}
@@ -2276,12 +2219,8 @@ static void unswitchNontrivialInvariants(
BasicBlock *ClonedPH = ClonedPHs.begin()->second;
// When doing a partial unswitch, we have to do a bit more work to build up
// the branch in the split block.
- if (PartiallyInvariant)
- buildPartialInvariantUnswitchConditionalBranch(
- *SplitBB, Invariants, Direction, *ClonedPH, *LoopPH, L, MSSAU);
- else
- buildPartialUnswitchConditionalBranch(*SplitBB, Invariants, Direction,
- *ClonedPH, *LoopPH);
+ buildPartialUnswitchConditionalBranch(*SplitBB, Invariants, Direction,
+ *ClonedPH, *LoopPH);
DTUpdates.push_back({DominatorTree::Insert, SplitBB, ClonedPH});
if (MSSAU) {
@@ -2333,7 +2272,7 @@ static void unswitchNontrivialInvariants(
// verification steps.
assert(DT.verify(DominatorTree::VerificationLevel::Fast));
- if (BI && !PartiallyInvariant) {
+ if (BI) {
// If we unswitched a branch which collapses the condition to a known
// constant we want to replace all the uses of the invariants within both
// the original and cloned blocks. We do this here so that we can use the
@@ -2351,8 +2290,7 @@ static void unswitchNontrivialInvariants(
// for each invariant operand.
// So it happens that for multiple-partial case we dont replace
// in the unswitched branch.
- bool ReplaceUnswitched =
- FullUnswitch || (Invariants.size() == 1) || PartiallyInvariant;
+ bool ReplaceUnswitched = FullUnswitch || (Invariants.size() == 1);
ConstantInt *UnswitchedReplacement =
Direction ? ConstantInt::getTrue(BI->getContext())
@@ -2447,7 +2385,7 @@ static void unswitchNontrivialInvariants(
for (Loop *UpdatedL : llvm::concat<Loop *>(NonChildClonedLoops, HoistedLoops))
if (UpdatedL->getParentLoop() == ParentL)
SibLoops.push_back(UpdatedL);
- UnswitchCB(IsStillLoop, PartiallyInvariant, SibLoops);
+ UnswitchCB(IsStillLoop, SibLoops);
if (MSSAU && VerifyMemorySSA)
MSSAU->getMemorySSA()->verifyMemorySSA();
@@ -2662,11 +2600,11 @@ static int CalculateUnswitchCostMultiplier(
return CostMultiplier;
}
-static bool unswitchBestCondition(
- Loop &L, DominatorTree &DT, LoopInfo &LI, AssumptionCache &AC,
- AAResults &AA, TargetTransformInfo &TTI,
- function_ref<void(bool, bool, ArrayRef<Loop *>)> UnswitchCB,
- ScalarEvolution *SE, MemorySSAUpdater *MSSAU) {
+static bool
+unswitchBestCondition(Loop &L, DominatorTree &DT, LoopInfo &LI,
+ AssumptionCache &AC, TargetTransformInfo &TTI,
+ function_ref<void(bool, ArrayRef<Loop *>)> UnswitchCB,
+ ScalarEvolution *SE, MemorySSAUpdater *MSSAU) {
// Collect all invariant conditions within this loop (as opposed to an inner
// loop which would be handled when visiting that inner loop).
SmallVector<std::pair<Instruction *, TinyPtrVector<Value *>>, 4>
@@ -2681,7 +2619,6 @@ static bool unswitchBestCondition(
CollectGuards = true;
}
- IVConditionInfo PartialIVInfo;
for (auto *BB : L.blocks()) {
if (LI.getLoopFor(BB) != &L)
continue;
@@ -2722,34 +2659,15 @@ static bool unswitchBestCondition(
}
Instruction &CondI = *cast<Instruction>(BI->getCondition());
- if (match(&CondI, m_CombineOr(m_LogicalAnd(), m_LogicalOr()))) {
- TinyPtrVector<Value *> Invariants =
- collectHomogenousInstGraphLoopInvariants(L, CondI, LI);
- if (Invariants.empty())
- continue;
+ if (!match(&CondI, m_CombineOr(m_LogicalAnd(), m_LogicalOr())))
+ continue;
- UnswitchCandidates.push_back({BI, std::move(Invariants)});
+ TinyPtrVector<Value *> Invariants =
+ collectHomogenousInstGraphLoopInvariants(L, CondI, LI);
+ if (Invariants.empty())
continue;
- }
- }
- Instruction *PartialIVCondBranch = nullptr;
- if (MSSAU && !any_of(UnswitchCandidates, [&L](auto &TerminatorAndInvariants) {
- return TerminatorAndInvariants.first == L.getHeader()->getTerminator();
- })) {
- MemorySSA *MSSA = MSSAU->getMemorySSA();
- if (auto Info = hasPartialIVCondition(L, MSSAThreshold, *MSSA, AA)) {
- LLVM_DEBUG(
- dbgs() << "simple-loop-unswitch: Found partially invariant condition "
- << *Info->InstToDuplicate[0] << "\n");
- PartialIVInfo = *Info;
- PartialIVCondBranch = L.getHeader()->getTerminator();
- TinyPtrVector<Value *> ValsToDuplicate;
- for (auto *Inst : Info->InstToDuplicate)
- ValsToDuplicate.push_back(Inst);
- UnswitchCandidates.push_back(
- {L.getHeader()->getTerminator(), std::move(ValsToDuplicate)});
- }
+ UnswitchCandidates.push_back({BI, std::move(Invariants)});
}
// If we didn't find any candidates, we're done.
@@ -2855,25 +2773,20 @@ static bool unswitchBestCondition(
continue;
// If this is a partial unswitch candidate, then it must be a conditional
- // branch with a condition of either `or`, `and`, their corresponding
- // select forms or partially invariant instructions. In that case, one of
- // the successors is necessarily duplicated, so don't even try to remove
- // its cost.
+ // branch with a condition of either `or`, `and`, or their corresponding
+ // select forms. In that case, one of the successors is necessarily
+ // duplicated, so don't even try to remove its cost.
if (!FullUnswitch) {
auto &BI = cast<BranchInst>(TI);
if (match(BI.getCondition(), m_LogicalAnd())) {
if (SuccBB == BI.getSuccessor(1))
continue;
- } else if (match(BI.getCondition(), m_LogicalOr())) {
+ } else {
+ assert(match(BI.getCondition(), m_LogicalOr()) &&
+ "Only `and` and `or` conditions can result in a partial "
+ "unswitch!");
if (SuccBB == BI.getSuccessor(0))
continue;
- } else if (!PartialIVInfo.InstToDuplicate.empty()) {
- if (PartialIVInfo.KnownValue->isOneValue() &&
- SuccBB == BI.getSuccessor(1))
- continue;
- else if (!PartialIVInfo.KnownValue->isOneValue() &&
- SuccBB == BI.getSuccessor(0))
- continue;
}
}
@@ -2942,9 +2855,6 @@ static bool unswitchBestCondition(
return false;
}
- if (BestUnswitchTI != PartialIVCondBranch)
- PartialIVInfo.InstToDuplicate.clear();
-
// If the best candidate is a guard, turn it into a branch.
if (isGuard(BestUnswitchTI))
BestUnswitchTI = turnGuardIntoBranch(cast<IntrinsicInst>(BestUnswitchTI), L,
@@ -2954,8 +2864,7 @@ static bool unswitchBestCondition(
<< BestUnswitchCost << ") terminator: " << *BestUnswitchTI
<< "\n");
unswitchNontrivialInvariants(L, *BestUnswitchTI, BestUnswitchInvariants,
- ExitBlocks, PartialIVInfo, DT, LI, AC,
- UnswitchCB, SE, MSSAU);
+ ExitBlocks, DT, LI, AC, UnswitchCB, SE, MSSAU);
return true;
}
@@ -2966,9 +2875,9 @@ static bool unswitchBestCondition(
/// looks at other loop invariant control flows and tries to unswitch those as
/// well by cloning the loop if the result is small enough.
///
-/// The `DT`, `LI`, `AC`, `AA`, `TTI` parameters are required analyses that are
-/// also updated based on the unswitch. The `MSSA` analysis is also updated if
-/// valid (i.e. its use is enabled).
+/// The `DT`, `LI`, `AC`, `TTI` parameters are required analyses that are also
+/// updated based on the unswitch.
+/// The `MSSA` analysis is also updated if valid (i.e. its use is enabled).
///
/// If either `NonTrivial` is true or the flag `EnableNonTrivialUnswitch` is
/// true, we will attempt to do non-trivial unswitching as well as trivial
@@ -2980,11 +2889,11 @@ static bool unswitchBestCondition(
///
/// If `SE` is non-null, we will update that analysis based on the unswitching
/// done.
-static bool
-unswitchLoop(Loop &L, DominatorTree &DT, LoopInfo &LI, AssumptionCache &AC,
- AAResults &AA, TargetTransformInfo &TTI, bool NonTrivial,
- function_ref<void(bool, bool, ArrayRef<Loop *>)> UnswitchCB,
- ScalarEvolution *SE, MemorySSAUpdater *MSSAU) {
+static bool unswitchLoop(Loop &L, DominatorTree &DT, LoopInfo &LI,
+ AssumptionCache &AC, TargetTransformInfo &TTI,
+ bool NonTrivial,
+ function_ref<void(bool, ArrayRef<Loop *>)> UnswitchCB,
+ ScalarEvolution *SE, MemorySSAUpdater *MSSAU) {
assert(L.isRecursivelyLCSSAForm(DT, LI) &&
"Loops must be in LCSSA form before unswitching.");
@@ -2996,7 +2905,7 @@ unswitchLoop(Loop &L, DominatorTree &DT, LoopInfo &LI, AssumptionCache &AC,
if (unswitchAllTrivialConditions(L, DT, LI, SE, MSSAU)) {
// If we unswitched successfully we will want to clean up the loop before
// processing it further so just mark it as unswitched and return.
- UnswitchCB(/*CurrentLoopValid*/ true, false, {});
+ UnswitchCB(/*CurrentLoopValid*/ true, {});
return true;
}
@@ -3032,7 +2941,7 @@ unswitchLoop(Loop &L, DominatorTree &DT, LoopInfo &LI, AssumptionCache &AC,
// Try to unswitch the best invariant condition. We prefer this full unswitch to
// a partial unswitch when possible below the threshold.
- if (unswitchBestCondition(L, DT, LI, AC, AA, TTI, UnswitchCB, SE, MSSAU))
+ if (unswitchBestCondition(L, DT, LI, AC, TTI, UnswitchCB, SE, MSSAU))
return true;
// No other opportunities to unswitch.
@@ -3053,7 +2962,6 @@ PreservedAnalyses SimpleLoopUnswitchPass::run(Loop &L, LoopAnalysisManager &AM,
std::string LoopName = std::string(L.getName());
auto UnswitchCB = [&L, &U, &LoopName](bool CurrentLoopValid,
- bool PartiallyInvariant,
ArrayRef<Loop *> NewLoops) {
// If we did a non-trivial unswitch, we have added new (cloned) loops.
if (!NewLoops.empty())
@@ -3061,10 +2969,9 @@ PreservedAnalyses SimpleLoopUnswitchPass::run(Loop &L, LoopAnalysisManager &AM,
// If the current loop remains valid, we should revisit it to catch any
// other unswitch opportunities. Otherwise, we need to mark it as deleted.
- if (CurrentLoopValid) {
- if (!PartiallyInvariant)
- U.revisitCurrentLoop();
- } else
+ if (CurrentLoopValid)
+ U.revisitCurrentLoop();
+ else
U.markLoopAsDeleted(L, LoopName);
};
@@ -3074,9 +2981,8 @@ PreservedAnalyses SimpleLoopUnswitchPass::run(Loop &L, LoopAnalysisManager &AM,
if (VerifyMemorySSA)
AR.MSSA->verifyMemorySSA();
}
- if (!unswitchLoop(L, AR.DT, AR.LI, AR.AC, AR.AA, AR.TTI, NonTrivial,
- UnswitchCB, &AR.SE,
- MSSAU.hasValue() ? MSSAU.getPointer() : nullptr))
+ if (!unswitchLoop(L, AR.DT, AR.LI, AR.AC, AR.TTI, NonTrivial, UnswitchCB,
+ &AR.SE, MSSAU.hasValue() ? MSSAU.getPointer() : nullptr))
return PreservedAnalyses::all();
if (AR.MSSA && VerifyMemorySSA)
@@ -3133,7 +3039,6 @@ bool SimpleLoopUnswitchLegacyPass::runOnLoop(Loop *L, LPPassManager &LPM) {
auto &DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
auto &LI = getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
auto &AC = getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
- auto &AA = getAnalysis<AAResultsWrapperPass>().getAAResults();
auto &TTI = getAnalysis<TargetTransformInfoWrapperPass>().getTTI(F);
MemorySSA *MSSA = nullptr;
Optional<MemorySSAUpdater> MSSAU;
@@ -3145,7 +3050,7 @@ bool SimpleLoopUnswitchLegacyPass::runOnLoop(Loop *L, LPPassManager &LPM) {
auto *SEWP = getAnalysisIfAvailable<ScalarEvolutionWrapperPass>();
auto *SE = SEWP ? &SEWP->getSE() : nullptr;
- auto UnswitchCB = [&L, &LPM](bool CurrentLoopValid, bool PartiallyInvariant,
+ auto UnswitchCB = [&L, &LPM](bool CurrentLoopValid,
ArrayRef<Loop *> NewLoops) {
// If we did a non-trivial unswitch, we have added new (cloned) loops.
for (auto *NewL : NewLoops)
@@ -3154,22 +3059,17 @@ bool SimpleLoopUnswitchLegacyPass::runOnLoop(Loop *L, LPPassManager &LPM) {
// If the current loop remains valid, re-add it to the queue. This is
// a little wasteful as we'll finish processing the current loop as well,
// but it is the best we can do in the old PM.
- if (CurrentLoopValid) {
- // If the current loop has been unswitched using a partially invariant
- // condition, we should not re-add the current loop to avoid unswitching
- // on the same condition again.
- if (!PartiallyInvariant)
- LPM.addLoop(*L);
- } else
+ if (CurrentLoopValid)
+ LPM.addLoop(*L);
+ else
LPM.markLoopAsDeleted(*L);
};
if (MSSA && VerifyMemorySSA)
MSSA->verifyMemorySSA();
- bool Changed =
- unswitchLoop(*L, DT, LI, AC, AA, TTI, NonTrivial, UnswitchCB, SE,
- MSSAU.hasValue() ? MSSAU.getPointer() : nullptr);
+ bool Changed = unswitchLoop(*L, DT, LI, AC, TTI, NonTrivial, UnswitchCB, SE,
+ MSSAU.hasValue() ? MSSAU.getPointer() : nullptr);
if (MSSA && VerifyMemorySSA)
MSSA->verifyMemorySSA();
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-mssa-threshold.ll b/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-mssa-threshold.ll
deleted file mode 100644
index 477e4e531a6ed..0000000000000
--- a/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-mssa-threshold.ll
+++ /dev/null
@@ -1,48 +0,0 @@
-; RUN: opt -loop-unswitch-memoryssa-threshold=0 -memssa-check-limit=1 -passes='loop-mssa(unswitch<nontrivial>),verify<loops>' -S < %s | FileCheck --check-prefix=THRESHOLD-0 %s
-; RUN: opt -memssa-check-limit=1 -passes='loop-mssa(unswitch<nontrivial>),verify<loops>' -S < %s | FileCheck --check-prefix=THRESHOLD-DEFAULT %s
-
-; Make sure -loop-unswitch-memoryssa-threshold works. The test uses
-; -memssa-check-limit=1 to effectively disable any MemorySSA optimizations
-; on construction, so the test can be kept simple.
-
-declare void @clobber()
-
-; Partial unswitching is possible, because the store in %noclobber does not
-; alias the load of the condition.
-define i32 @partial_unswitch_true_successor_noclobber(i32* noalias %ptr.1, i32* noalias %ptr.2, i32 %N) {
-; THRESHOLD-0-LABEL: @partial_unswitch_true_successor
-; THRESHOLD-0: entry:
-; THRESHOLD-0: br label %loop.header
-;
-; THRESHOLD-DEFAULT-LABEL: @partial_unswitch_true_successor
-; THRESHOLD-DEFAULT-NEXT: entry:
-; THRESHOLD-DEFAULT-NEXT: [[LV:%[0-9]+]] = load i32, i32* %ptr.1, align 4
-; THRESHOLD-DEFAULT-NEXT: [[C:%[0-9]+]] = icmp eq i32 [[LV]], 100
-; THRESHOLD-DEFAULT-NEXT: br i1 [[C]]
-;
-entry:
- br label %loop.header
-
-loop.header:
- %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- %lv = load i32, i32* %ptr.1
- %sc = icmp eq i32 %lv, 100
- br i1 %sc, label %noclobber, label %clobber
-
-noclobber:
- %gep.1 = getelementptr i32, i32* %ptr.2, i32 %iv
- store i32 %lv, i32* %gep.1
- br label %loop.latch
-
-clobber:
- call void @clobber()
- br label %loop.latch
-
-loop.latch:
- %c = icmp ult i32 %iv, %N
- %iv.next = add i32 %iv, 1
- br i1 %c, label %loop.header, label %exit
-
-exit:
- ret i32 10
-}
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll b/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll
deleted file mode 100644
index df9da1ab8dafa..0000000000000
--- a/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch-update-memoryssa.ll
+++ /dev/null
@@ -1,76 +0,0 @@
-; RUN: opt -passes='loop-mssa(unswitch<nontrivial>),verify<loops>' -verify-dom-info -verify-memoryssa -S %s | FileCheck %s
-; RUN: opt -passes='loop-mssa(unswitch<nontrivial>),verify<loops>' -memssa-check-limit=3 -verify-dom-info -verify-memoryssa -S %s | FileCheck %s
-
-declare void @clobber()
-
-; Check that MemorySSA updating can deal with a clobbering access of a
-; duplicated load being a MemoryPHI outside the loop.
-define void @partial_unswitch_memssa_update(i32* noalias %ptr, i1 %c) {
-; CHECK-LABEL: @partial_unswitch_memssa_update(
-; CHECK-LABEL: loop.ph:
-; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i32, i32* %ptr, align 4
-; CHECK-NEXT: [[C:%[a-z0-9]+]] = icmp eq i32 [[LV]], 0
-; CHECK-NEXT: br i1 [[C]]
-entry:
- br i1 %c, label %loop.ph, label %outside.clobber
-
-outside.clobber:
- call void @clobber()
- br label %loop.ph
-
-loop.ph:
- br label %loop.header
-
-loop.header:
- %lv = load i32, i32* %ptr, align 4
- %hc = icmp eq i32 %lv, 0
- br i1 %hc, label %if, label %then
-
-if:
- br label %loop.latch
-
-then:
- br label %loop.latch
-
-loop.latch:
- br i1 true, label %loop.header, label %exit
-
-exit:
- ret void
-}
-
-; Check that MemorySSA updating can deal with skipping defining accesses in the
-; loop body until it finds the first defining access outside the loop.
-define void @partial_unswitch_inloop_stores_beteween_outside_defining_access(i64* noalias %ptr, i16* noalias %src) {
-; CHECK-LABEL: @partial_unswitch_inloop_stores_beteween_outside_defining_access
-; CHECK-LABEL: entry:
-; CHECK-NEXT: store i64 0, i64* %ptr, align 1
-; CHECK-NEXT: store i64 1, i64* %ptr, align 1
-; CHECK-NEXT: [[LV:%[a-z0-9]+]] = load i16, i16* %src, align 1
-; CHECK-NEXT: [[C:%[a-z0-9]+]] = icmp eq i16 [[LV]], 0
-; CHECK-NEXT: br i1 [[C]]
-;
-entry:
- store i64 0, i64* %ptr, align 1
- store i64 1, i64* %ptr, align 1
- br label %loop
-
-loop:
- %iv = phi i32 [ 0, %entry ], [ %iv.next, %loop.latch ]
- store i64 2, i64* %ptr, align 1
- %lv = load i16, i16* %src, align 1
- %invar.cond = icmp eq i16 %lv, 0
- br i1 %invar.cond, label %noclobber, label %loop.latch
-
-noclobber:
- br label %loop.latch
-
-loop.latch:
- %iv.next = add i32 %iv, 1
- %ec = icmp eq i32 %iv, 1000
- br i1 %ec, label %exit, label %loop
-
-exit:
- ret void
-}
-
diff --git a/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll b/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
index acc6a48fe123c..cb78d5e662cc1 100644
--- a/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
+++ b/llvm/test/Transforms/SimpleLoopUnswitch/partial-unswitch.ll
@@ -6,27 +6,10 @@ declare void @clobber()
define i32 @partial_unswitch_true_successor(i32* %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
@@ -35,11 +18,9 @@ define i32 @partial_unswitch_true_successor(i32* %ptr, i32 %N) {
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -71,27 +52,10 @@ exit:
define i32 @partial_unswitch_false_successor(i32* %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_false_successor(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_US:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[CLOBBER:%.*]], label [[NOCLOBBER:%.*]]
; CHECK: clobber:
@@ -100,11 +64,9 @@ define i32 @partial_unswitch_false_successor(i32* %ptr, i32 %N) {
; CHECK: noclobber:
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -136,29 +98,10 @@ exit:
define i32 @partial_unswtich_gep_load_icmp(i32** %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswtich_gep_load_icmp(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32*, i32** [[PTR:%.*]], i32 1
-; CHECK-NEXT: [[TMP1:%.*]] = load i32*, i32** [[TMP0]], align 8
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[TMP1]], align 4
-; CHECK-NEXT: [[TMP3:%.*]] = icmp eq i32 [[TMP2]], 100
-; CHECK-NEXT: br i1 [[TMP3]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32*, i32** [[PTR]], i32 1
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32*, i32** [[PTR:%.*]], i32 1
; CHECK-NEXT: [[LV_1:%.*]] = load i32*, i32** [[GEP]], align 8
; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[LV_1]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
@@ -169,11 +112,9 @@ define i32 @partial_unswtich_gep_load_icmp(i32** %ptr, i32 %N) {
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -207,32 +148,11 @@ exit:
define i32 @partial_unswitch_reduction_phi(i32* %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_reduction_phi(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT:%.*]], label [[ENTRY_SPLIT_US:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: [[RED_US:%.*]] = phi i32 [ 20, [[ENTRY_SPLIT_US]] ], [ [[RED_NEXT_US:%.*]], [[LOOP_LATCH_US]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: [[ADD_10_US:%.*]] = add i32 [[RED_US]], 10
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[RED_NEXT_US]] = phi i32 [ [[ADD_10_US]], [[NOCLOBBER_US]] ]
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: [[RED_NEXT_LCSSA_US:%.*]] = phi i32 [ [[RED_NEXT_US]], [[LOOP_LATCH_US]] ]
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[RED:%.*]] = phi i32 [ 20, [[ENTRY_SPLIT]] ], [ [[RED_NEXT:%.*]], [[LOOP_LATCH]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[RED:%.*]] = phi i32 [ 20, [[ENTRY]] ], [ [[RED_NEXT:%.*]], [[LOOP_LATCH]] ]
+; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[CLOBBER:%.*]], label [[NOCLOBBER:%.*]]
; CHECK: clobber:
@@ -244,15 +164,12 @@ define i32 @partial_unswitch_reduction_phi(i32* %ptr, i32 %N) {
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
; CHECK-NEXT: [[RED_NEXT]] = phi i32 [ [[ADD_5]], [[CLOBBER]] ], [ [[ADD_10]], [[NOCLOBBER]] ]
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: [[RED_NEXT_LCSSA:%.*]] = phi i32 [ [[RED_NEXT]], [[LOOP_LATCH]] ]
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
-; CHECK-NEXT: [[DOTUS_PHI:%.*]] = phi i32 [ [[RED_NEXT_LCSSA]], [[EXIT_SPLIT]] ], [ [[RED_NEXT_LCSSA_US]], [[EXIT_SPLIT_US]] ]
-; CHECK-NEXT: ret i32 [[DOTUS_PHI]]
+; CHECK-NEXT: [[RED_NEXT_LCSSA:%.*]] = phi i32 [ [[RED_NEXT]], [[LOOP_LATCH]] ]
+; CHECK-NEXT: ret i32 [[RED_NEXT_LCSSA]]
;
entry:
br label %loop.header
@@ -289,45 +206,23 @@ exit:
define i32 @partial_unswitch_true_successor_noclobber(i32* noalias %ptr.1, i32* noalias %ptr.2, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_noclobber(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR_1:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: [[LV_US:%.*]] = load i32, i32* [[PTR_1]], align 4
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: [[GEP_1_US:%.*]] = getelementptr i32, i32* [[PTR_2:%.*]], i32 [[IV_US]]
-; CHECK-NEXT: store i32 [[LV_US]], i32* [[GEP_1_US]], align 4
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR_1]], align 4
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR_1:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
-; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[PTR_2]], i32 [[IV]]
+; CHECK-NEXT: [[GEP_1:%.*]] = getelementptr i32, i32* [[PTR_2:%.*]], i32 [[IV]]
; CHECK-NEXT: store i32 [[LV]], i32* [[GEP_1]], align 4
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: clobber:
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -606,26 +501,9 @@ define i32 @partial_unswitch_true_successor_preheader_insertion(i32* %ptr, i32 %
; CHECK-NEXT: [[EC:%.*]] = icmp ne i32* [[PTR:%.*]], null
; CHECK-NEXT: br i1 [[EC]], label [[LOOP_PH:%.*]], label [[EXIT:%.*]]
; CHECK: loop.ph:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[LOOP_PH_SPLIT_US:%.*]], label [[LOOP_PH_SPLIT:%.*]]
-; CHECK: loop.ph.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[LOOP_PH_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_LOOPEXIT_SPLIT_US:%.*]]
-; CHECK: exit.loopexit.split.us:
-; CHECK-NEXT: br label [[EXIT_LOOPEXIT:%.*]]
-; CHECK: loop.ph.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[LOOP_PH_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[LOOP_PH]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
@@ -635,11 +513,9 @@ define i32 @partial_unswitch_true_successor_preheader_insertion(i32* %ptr, i32 %
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_LOOPEXIT_SPLIT:%.*]]
-; CHECK: exit.loopexit.split:
-; CHECK-NEXT: br label [[EXIT_LOOPEXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_LOOPEXIT:%.*]]
; CHECK: exit.loopexit:
; CHECK-NEXT: br label [[EXIT]]
; CHECK: exit:
@@ -682,27 +558,10 @@ define i32 @partial_unswitch_true_successor_insert_point(i32* %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_insert_point(
; CHECK-NEXT: entry:
; CHECK-NEXT: call void @clobber()
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
; CHECK: noclobber:
@@ -711,11 +570,9 @@ define i32 @partial_unswitch_true_successor_insert_point(i32* %ptr, i32 %N) {
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -751,28 +608,10 @@ exit:
define i32 @partial_unswitch_true_successor_hoist_invariant(i32* %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_successor_hoist_invariant(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 1
-; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[TMP0]], align 4
-; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 100
-; CHECK-NEXT: br i1 [[TMP2]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[NOCLOBBER_US:%.*]]
-; CHECK: noclobber.us:
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[PTR]], i64 1
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[GEP:%.*]] = getelementptr i32, i32* [[PTR:%.*]], i64 1
; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[GEP]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[NOCLOBBER:%.*]], label [[CLOBBER:%.*]]
@@ -782,11 +621,9 @@ define i32 @partial_unswitch_true_successor_hoist_invariant(i32* %ptr, i32 %N) {
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -1046,36 +883,19 @@ exit:
define i32 @partial_unswitch_true_to_latch(i32* %ptr, i32 %N) {
; CHECK-LABEL: @partial_unswitch_true_to_latch(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 4
-; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i32 [[TMP0]], 100
-; CHECK-NEXT: br i1 [[TMP1]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: br label [[LOOP_HEADER_US:%.*]]
-; CHECK: loop.header.us:
-; CHECK-NEXT: [[IV_US:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT_US]] ], [ [[IV_NEXT_US:%.*]], [[LOOP_LATCH_US:%.*]] ]
-; CHECK-NEXT: br label [[LOOP_LATCH_US]]
-; CHECK: loop.latch.us:
-; CHECK-NEXT: [[C_US:%.*]] = icmp ult i32 [[IV_US]], [[N:%.*]]
-; CHECK-NEXT: [[IV_NEXT_US]] = add i32 [[IV_US]], 1
-; CHECK-NEXT: br i1 [[C_US]], label [[LOOP_HEADER_US]], label [[EXIT_SPLIT_US:%.*]]
-; CHECK: exit.split.us:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: entry.split:
; CHECK-NEXT: br label [[LOOP_HEADER:%.*]]
; CHECK: loop.header:
-; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY_SPLIT]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
-; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR]], align 4
+; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[LOOP_LATCH:%.*]] ]
+; CHECK-NEXT: [[LV:%.*]] = load i32, i32* [[PTR:%.*]], align 4
; CHECK-NEXT: [[SC:%.*]] = icmp eq i32 [[LV]], 100
; CHECK-NEXT: br i1 [[SC]], label [[LOOP_LATCH]], label [[CLOBBER:%.*]]
; CHECK: clobber:
; CHECK-NEXT: call void @clobber()
; CHECK-NEXT: br label [[LOOP_LATCH]]
; CHECK: loop.latch:
-; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N]]
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[IV]], [[N:%.*]]
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1
-; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT_SPLIT:%.*]]
-; CHECK: exit.split:
-; CHECK-NEXT: br label [[EXIT]]
+; CHECK-NEXT: br i1 [[C]], label [[LOOP_HEADER]], label [[EXIT:%.*]]
; CHECK: exit:
; CHECK-NEXT: ret i32 10
;
@@ -1100,68 +920,3 @@ loop.latch:
exit:
ret i32 10
}
-
-; There could be multiple unswitch candidates which include partially invariant
-; condition. When the exiting block is selected as best unswitch one, clone loop
-; blocks.
-define i32 @partial_unswitch_exiting_block_with_multiple_unswitch_candidates(i32 %0, i32 %1, i32* %ptr) {
-; CHECK-LABEL: @partial_unswitch_exiting_block_with_multiple_unswitch_candidates(
-; CHECK-NEXT: entry:
-; CHECK-NEXT: [[EXIT_COND:%.*]] = icmp ne i32 [[TMP0:%.*]], 0
-; CHECK-NEXT: br i1 [[EXIT_COND]], label [[ENTRY_SPLIT_US:%.*]], label [[ENTRY_SPLIT:%.*]]
-; CHECK: entry.split.us:
-; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[PTR:%.*]], align 16
-; CHECK-NEXT: [[TMP3:%.*]] = icmp ult i32 [[TMP2]], 41
-; CHECK-NEXT: br i1 [[TMP3]], label [[ENTRY_SPLIT_US_SPLIT:%.*]], label [[ENTRY_SPLIT_US_SPLIT_US:%.*]]
-; CHECK: entry.split.us.split.us:
-; CHECK-NEXT: br label [[LOOP_US_US:%.*]]
-; CHECK: loop.us.us:
-; CHECK-NEXT: br label [[EXITING_US_US:%.*]]
-; CHECK: exiting.us.us:
-; CHECK-NEXT: br label [[LOOP_US_US]]
-; CHECK: entry.split.us.split:
-; CHECK-NEXT: br label [[LOOP_US:%.*]]
-; CHECK: loop.us:
-; CHECK-NEXT: [[VAL_US:%.*]] = load i32, i32* [[PTR]], align 16
-; CHECK-NEXT: [[IF_COND_US:%.*]] = icmp ult i32 [[VAL_US]], 41
-; CHECK-NEXT: br i1 [[IF_COND_US]], label [[IF_THEN_US:%.*]], label [[EXITING_US:%.*]]
-; CHECK: if.then.us:
-; CHECK-NEXT: store i32 [[TMP1:%.*]], i32* [[PTR]], align 16
-; CHECK-NEXT: br label [[EXITING_US]]
-; CHECK: exiting.us:
-; CHECK-NEXT: br label [[LOOP_US]]
-; CHECK: entry.split:
-; CHECK-NEXT: br label [[LOOP:%.*]]
-; CHECK: loop:
-; CHECK-NEXT: [[VAL:%.*]] = load i32, i32* [[PTR]], align 16
-; CHECK-NEXT: [[IF_COND:%.*]] = icmp ult i32 [[VAL]], 41
-; CHECK-NEXT: br i1 [[IF_COND]], label [[IF_THEN:%.*]], label [[EXITING:%.*]]
-; CHECK: if.then:
-; CHECK-NEXT: store i32 [[TMP1]], i32* [[PTR]], align 16
-; CHECK-NEXT: br label [[EXITING]]
-; CHECK: exiting:
-; CHECK-NEXT: br label [[EXIT:%.*]]
-; CHECK: exit:
-; CHECK-NEXT: [[RET_VAL:%.*]] = phi i32 [ 1, [[EXITING]] ]
-; CHECK-NEXT: ret i32 [[RET_VAL]]
-;
-entry:
- %exit.cond = icmp ne i32 %0, 0
- br label %loop
-
-loop:
- %val = load i32, i32* %ptr, align 16
- %if.cond = icmp ult i32 %val, 41
- br i1 %if.cond, label %if.then, label %exiting
-
-if.then:
- store i32 %1, i32* %ptr, align 16
- br label %exiting
-
-exiting:
- br i1 %exit.cond, label %loop, label %exit
-
-exit:
- %ret.val = phi i32 [ 1, %exiting ]
- ret i32 %ret.val
-}
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