[PATCH] D100725: GlobalISel: Help reduce operation width for instruction with two results.

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp:4050
+    else
+      Inst = MIRBuilder.buildInstr(Opc, {NarrowDstTy, NarrowDstTy}, InputRegs,
+                                   Flags);
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This is assuming the two results have the same type, which I guess is fine for now


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Comment at: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp:4063
+      ResultRegs[I].append(NumUndefParts,
+                           MIRBuilder.buildUndef(NarrowDstTy).getReg(0));
+  }
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You don't need to call build undef for each time. I think just append(Num, Reg) works?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D100725/new/

https://reviews.llvm.org/D100725