[PATCH] D101834: [llvm][sve] Lowering for VLS MLOAD/MSTORE

David Truby via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 12 05:19:16 PDT 2021


DavidTruby marked 4 inline comments as done.
DavidTruby added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:1184
+      // NEON doesn't support masked loads or stores, but SVE does
+      for (auto VT : {MVT::v4f16, MVT::v8f16, MVT::v2f32, MVT::v4f32, MVT::v1f64, MVT::v2f64,
+                      MVT::v8i8, MVT::v16i8, MVT::v4i16, MVT::v8i16, MVT::v2i32, 
----------------
sdesmalen wrote:
> nit: is MVT::v2f16 missing or is this type widened?
I believe v2f16 isn't a legal type here, so we don't want to do the custom lowering for it. We can just allow it to be handled as before.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:4604
+  case ISD::MLOAD:
+    if (useSVEForFixedLengthVectorVT(Op.getValueType()), true)
+      return LowerFixedLengthVectorMLoadToSVE(Op, DAG);
----------------
sdesmalen wrote:
> peterwaller-arm wrote:
> > Comma true again.
> Are masked SVE masked load/store instructions not always more efficient than scalarising?
These if statements aren't necessary, as we won't select custom lowering here unless we already have a type that we want to use this lowering for. Consequently I've just removed them.


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  https://reviews.llvm.org/D101834/new/

https://reviews.llvm.org/D101834



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