[PATCH] D102073: [TargetLowering] Improve legalization of scalable vector types
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 12 05:10:26 PDT 2021
frasercrmck added inline comments.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp:619
- // FIXME: Use CONCAT for 2x -> 4x.
- return DAG.getBuildVector(PartVT, DL, Ops);
- }
+ if (ElementCount::isKnownLE(PartNumElts, ValueNumElts) ||
+ PartVT.getVectorElementType() != ValueVT.getVectorElementType())
----------------
sdesmalen wrote:
> Should this also return `SDValue()` if `PartNumElts.isScalable() != ValueNumElts.isScalable()` ?
Possibly. I was thinking that technically we can widen a fixed-length Value to a scalable Part -- the same way we widen a scalable Value to scalable Part -- using INSERT_SUBVECTOR. Though only if the Part element count is known to be greater than the Value element count, so this would disallow widening v4i32 to nxv1i32, for instance. We definitely can't support widening a scalable to a fixed so we must certainly return `SDValue()` there.
I tried to permit these scenarios in the code, though it's hypothetical since we don't have a target that uses the "mixed" widening.
If you think that all of this is unnecessary then I'm happy to take your suggestion.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D102073/new/
https://reviews.llvm.org/D102073
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