[PATCH] D102279: [InstCombine] Support one-hot merge for logical and/or

[Nikita Popov via Phabricator via llvm-commits]

nikic added inline comments.


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Comment at: llvm/test/Transforms/InstCombine/onehot_merge.ll:69
 ; CHECK-NEXT:    [[T4:%.*]] = shl i32 1, [[C2:%.*]]
-; CHECK-NEXT:    [[T1:%.*]] = and i32 [[T]], [[K:%.*]]
-; CHECK-NEXT:    [[T2:%.*]] = icmp eq i32 [[T1]], 0
-; CHECK-NEXT:    [[T5:%.*]] = and i32 [[T4]], [[K]]
-; CHECK-NEXT:    [[T6:%.*]] = icmp eq i32 [[T5]], 0
-; CHECK-NEXT:    [[OR:%.*]] = select i1 [[T2]], i1 true, i1 [[T6]]
-; CHECK-NEXT:    ret i1 [[OR]]
+; CHECK-NEXT:    [[TMP1:%.*]] = freeze i32 [[T4]]
+; CHECK-NEXT:    [[TMP2:%.*]] = or i32 [[T]], [[TMP1]]
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As a side-note, it would probably make sense to push freeze instructions through one-use non-canCreateUndefOrPoison instructions. `1 << freeze(x)` is better than `freeze(1 << x)`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D102279/new/

https://reviews.llvm.org/D102279