[PATCH] D102268: [RISCV] Move instruction information into the namespace RISCVII (NFC)
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 11 11:58:00 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/MCTargetDesc/RISCVBaseInfo.h:144
+/// \returns true if there is a SEW operand for the instruction.
+static
+inline bool hasSEWOp(uint64_t TSFlags) {
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Why is static on a different line? Did clang-format do that?
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D102268/new/
https://reviews.llvm.org/D102268
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