[PATCH] D101898: [ARM] Prevent spilling between ldrex/strex pairs

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMExpandPseudoInsts.cpp:1573
+    assert((UxtOp == 0 || UxtOp == ARM::tUXTB || UxtOp == ARM::tUXTH) &&
+           "Use of t2UXTB/t2UXTH requires at least ARMv8-M.baseline");
+    assert(ARM::tGPRRegClass.contains(DesiredReg) &&
----------------
The text of this assertion seems seems wrong; the point of the assertion is that ARMv8-M.baseline doesn't have t2UXTB/t2UXTH


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Comment at: llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp:3302
   if (MemTy == MVT::i8)
-    Opcode = ARM::CMP_SWAP_8;
+    Opcode = Subtarget->isThumb() ? ARM::tCMP_SWAP_8 : ARM::CMP_SWAP_8;
   else if (MemTy == MVT::i16)
----------------
isThumb() includes both Thumb1 (here, v8m.base) and Thumb2.  That's fine, but if you're going to do that, please remove the dead Thumb2 codepaths from ARMExpandPseudoInsts.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101898/new/

https://reviews.llvm.org/D101898