[PATCH] D101944: [X86][Codegen] Shift amount mod: sh? i64 x, (32-y) --> sh? i64 x, -(y+32)

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a reviewer: pengfei.
RKSimon added a comment.

I think this does make sense, the increased use of basic 2op LEAs shouldn't be a perf issue, and we should reduce register pressure.

Any other comments?



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Comment at: llvm/lib/Target/X86/X86ISelDAGToDAG.cpp:3859
+      SDValue X;
+      if (cast<ConstantSDNode>(Add0)->getZExtValue() % Size == 0)
+        X = Add1;
----------------
Please can you rebase this? I've tried to cleanup some of the repeated casts


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D101944