[PATCH] D102231: [AMDGPU][AsmParser/Disassembler] Correct A16 and G16 handling

[David Stuttard via Phabricator via llvm-commits]

dstuttard created this revision.
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A16 support for image instructions assembly/disassembly (gfx10) was missing

Also refactor MIMG op addr size calcs to common function

We'd got 3 places where the same operation was being done.

One test is now marked XFAIL until a related codegen patch is in place


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D102231

Files:
  llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
  llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
  llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
  llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
  llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
  llvm/test/MC/AMDGPU/gfx10_asm_mimg.s
  llvm/test/MC/Disassembler/AMDGPU/mimg_gfx10.txt

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