[PATCH] D101349: AArch64: support i128 cmpxchg in GlobalISel.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon May 10 14:14:12 PDT 2021
efriedma added a comment.
This might be a bit crazy, but instead of emitting CASPX directly from globalisel, did you consider just emitting CMP_SWAP_128, then converting it to CASPX after isel? Not sure it's worth shifting around the complexity like this, but maybe worth considering.
> - -O0, no LSE. The IR is expanded to ldxp/stxp and we need patterns & code to select them.
> - -O1, no LSE. We get G_ATOMIC_CMPXCHG, and need to produce CMP_SWAP_N pseudos. The registers are all 64-bit so this is easy in the existing framework.
> - LSE. We get G_ATOMIC_CMPXCHG and need to produce a CASP instruction with XSeqPair registers.
I think you accidentally switched -O0 and -O1.
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https://reviews.llvm.org/D101349/new/
https://reviews.llvm.org/D101349
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