[llvm] b483c0a - [X86][SSE] Merge equal X32/X64 check prefixes. NFCI.

Simon Pilgrim via llvm-commits llvm-commits at lists.llvm.org
Mon May 10 09:18:50 PDT 2021


Author: Simon Pilgrim
Date: 2021-05-10T17:18:35+01:00
New Revision: b483c0afb39e6d9f02e5fcc3b3cee0c99b4f977a

URL: https://github.com/llvm/llvm-project/commit/b483c0afb39e6d9f02e5fcc3b3cee0c99b4f977a
DIFF: https://github.com/llvm/llvm-project/commit/b483c0afb39e6d9f02e5fcc3b3cee0c99b4f977a.diff

LOG: [X86][SSE] Merge equal X32/X64 check prefixes. NFCI.

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/horizontal-shuffle.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/horizontal-shuffle.ll b/llvm/test/CodeGen/X86/horizontal-shuffle.ll
index 70fc7fa4a1d7..5f2727420233 100644
--- a/llvm/test/CodeGen/X86/horizontal-shuffle.ll
+++ b/llvm/test/CodeGen/X86/horizontal-shuffle.ll
@@ -1,21 +1,16 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X32
-; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s --check-prefix=X64
+; RUN: llc < %s -mtriple=i686-apple-darwin -mattr=+avx2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-apple-darwin -mattr=+avx2 | FileCheck %s
 
 ;
 ; 128-bit Vectors
 ;
 
 define <4 x float> @test_unpackl_fhadd_128(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, <4 x float> %a3) {
-; X32-LABEL: test_unpackl_fhadd_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhaddps %xmm2, %xmm0, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_fhadd_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhaddps %xmm2, %xmm0, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_fhadd_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhaddps %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a0, <4 x float> %a1)
   %2 = call <4 x float> @llvm.x86.sse3.hadd.ps(<4 x float> %a2, <4 x float> %a3)
   %3 = shufflevector <4 x float> %1, <4 x float> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
@@ -23,15 +18,10 @@ define <4 x float> @test_unpackl_fhadd_128(<4 x float> %a0, <4 x float> %a1, <4
 }
 
 define <2 x double> @test_unpackh_fhadd_128(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> %a3) {
-; X32-LABEL: test_unpackh_fhadd_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhaddpd %xmm3, %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_fhadd_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhaddpd %xmm3, %xmm1, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_fhadd_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhaddpd %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a0, <2 x double> %a1)
   %2 = call <2 x double> @llvm.x86.sse3.hadd.pd(<2 x double> %a2, <2 x double> %a3)
   %3 = shufflevector <2 x double> %1, <2 x double> %2, <2 x i32> <i32 1, i32 3>
@@ -39,15 +29,10 @@ define <2 x double> @test_unpackh_fhadd_128(<2 x double> %a0, <2 x double> %a1,
 }
 
 define <2 x double> @test_unpackl_fhsub_128(<2 x double> %a0, <2 x double> %a1, <2 x double> %a2, <2 x double> %a3) {
-; X32-LABEL: test_unpackl_fhsub_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhsubpd %xmm2, %xmm0, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_fhsub_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhsubpd %xmm2, %xmm0, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_fhsub_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhsubpd %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a0, <2 x double> %a1)
   %2 = call <2 x double> @llvm.x86.sse3.hsub.pd(<2 x double> %a2, <2 x double> %a3)
   %3 = shufflevector <2 x double> %1, <2 x double> %2, <2 x i32> <i32 0, i32 2>
@@ -55,15 +40,10 @@ define <2 x double> @test_unpackl_fhsub_128(<2 x double> %a0, <2 x double> %a1,
 }
 
 define <4 x float> @test_unpackh_fhsub_128(<4 x float> %a0, <4 x float> %a1, <4 x float> %a2, <4 x float> %a3) {
-; X32-LABEL: test_unpackh_fhsub_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhsubps %xmm3, %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_fhsub_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhsubps %xmm3, %xmm1, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_fhsub_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhsubps %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a0, <4 x float> %a1)
   %2 = call <4 x float> @llvm.x86.sse3.hsub.ps(<4 x float> %a2, <4 x float> %a3)
   %3 = shufflevector <4 x float> %1, <4 x float> %2, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
@@ -71,15 +51,10 @@ define <4 x float> @test_unpackh_fhsub_128(<4 x float> %a0, <4 x float> %a1, <4
 }
 
 define <8 x i16> @test_unpackl_hadd_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8 x i16> %a3) {
-; X32-LABEL: test_unpackl_hadd_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphaddw %xmm2, %xmm0, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_hadd_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphaddw %xmm2, %xmm0, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_hadd_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphaddw %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a0, <8 x i16> %a1)
   %2 = call <8 x i16> @llvm.x86.ssse3.phadd.w.128(<8 x i16> %a2, <8 x i16> %a3)
   %3 = shufflevector <8 x i16> %1, <8 x i16> %2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
@@ -87,15 +62,10 @@ define <8 x i16> @test_unpackl_hadd_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16>
 }
 
 define <4 x i32> @test_unpackh_hadd_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {
-; X32-LABEL: test_unpackh_hadd_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphaddd %xmm3, %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_hadd_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphaddd %xmm3, %xmm1, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_hadd_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphaddd %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a0, <4 x i32> %a1)
   %2 = call <4 x i32> @llvm.x86.ssse3.phadd.d.128(<4 x i32> %a2, <4 x i32> %a3)
   %3 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 2, i32 3, i32 6, i32 7>
@@ -103,15 +73,10 @@ define <4 x i32> @test_unpackh_hadd_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32>
 }
 
 define <4 x i32> @test_unpackl_hsub_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {
-; X32-LABEL: test_unpackl_hsub_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphsubd %xmm2, %xmm0, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_hsub_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphsubd %xmm2, %xmm0, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_hsub_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphsubd %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a0, <4 x i32> %a1)
   %2 = call <4 x i32> @llvm.x86.ssse3.phsub.d.128(<4 x i32> %a2, <4 x i32> %a3)
   %3 = shufflevector <4 x i32> %1, <4 x i32> %2, <4 x i32> <i32 0, i32 1, i32 4, i32 5>
@@ -119,15 +84,10 @@ define <4 x i32> @test_unpackl_hsub_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32>
 }
 
 define <8 x i16> @test_unpackh_hsub_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8 x i16> %a3) {
-; X32-LABEL: test_unpackh_hsub_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphsubw %xmm3, %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_hsub_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphsubw %xmm3, %xmm1, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_hsub_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphsubw %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a0, <8 x i16> %a1)
   %2 = call <8 x i16> @llvm.x86.ssse3.phsub.w.128(<8 x i16> %a2, <8 x i16> %a3)
   %3 = shufflevector <8 x i16> %1, <8 x i16> %2, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
@@ -135,15 +95,10 @@ define <8 x i16> @test_unpackh_hsub_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16>
 }
 
 define <16 x i8> @test_unpackl_packss_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8 x i16> %a3) {
-; X32-LABEL: test_unpackl_packss_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpacksswb %xmm2, %xmm0, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_packss_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpacksswb %xmm2, %xmm0, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_packss_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpacksswb %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a0, <8 x i16> %a1)
   %2 = call <16 x i8> @llvm.x86.sse2.packsswb.128(<8 x i16> %a2, <8 x i16> %a3)
   %3 = shufflevector <16 x i8> %1, <16 x i8> %2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23>
@@ -151,15 +106,10 @@ define <16 x i8> @test_unpackl_packss_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16
 }
 
 define <8 x i16> @test_unpackh_packss_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {
-; X32-LABEL: test_unpackh_packss_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpackssdw %xmm3, %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_packss_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpackssdw %xmm3, %xmm1, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_packss_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpackssdw %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a0, <4 x i32> %a1)
   %2 = call <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32> %a2, <4 x i32> %a3)
   %3 = shufflevector <8 x i16> %1, <8 x i16> %2, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15>
@@ -167,15 +117,10 @@ define <8 x i16> @test_unpackh_packss_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32
 }
 
 define <8 x i16> @test_unpackl_packus_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32> %a2, <4 x i32> %a3) {
-; X32-LABEL: test_unpackl_packus_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_packus_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_packus_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpackusdw %xmm2, %xmm0, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a0, <4 x i32> %a1)
   %2 = call <8 x i16> @llvm.x86.sse41.packusdw(<4 x i32> %a2, <4 x i32> %a3)
   %3 = shufflevector <8 x i16> %1, <8 x i16> %2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11>
@@ -183,15 +128,10 @@ define <8 x i16> @test_unpackl_packus_128(<4 x i32> %a0, <4 x i32> %a1, <4 x i32
 }
 
 define <16 x i8> @test_unpackh_packus_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2, <8 x i16> %a3) {
-; X32-LABEL: test_unpackh_packus_128:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpackuswb %xmm3, %xmm1, %xmm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_packus_128:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpackuswb %xmm3, %xmm1, %xmm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_packus_128:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpackuswb %xmm3, %xmm1, %xmm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %a0, <8 x i16> %a1)
   %2 = call <16 x i8> @llvm.x86.sse2.packuswb.128(<8 x i16> %a2, <8 x i16> %a3)
   %3 = shufflevector <16 x i8> %1, <16 x i8> %2, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31>
@@ -203,15 +143,10 @@ define <16 x i8> @test_unpackh_packus_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16
 ;
 
 define <8 x float> @test_unpackl_fhadd_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, <8 x float> %a3) {
-; X32-LABEL: test_unpackl_fhadd_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhaddps %ymm2, %ymm0, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_fhadd_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhaddps %ymm2, %ymm0, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_fhadd_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhaddps %ymm2, %ymm0, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %a0, <8 x float> %a1)
   %2 = call <8 x float> @llvm.x86.avx.hadd.ps.256(<8 x float> %a2, <8 x float> %a3)
   %3 = shufflevector <8 x float> %1, <8 x float> %2, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13>
@@ -219,15 +154,10 @@ define <8 x float> @test_unpackl_fhadd_256(<8 x float> %a0, <8 x float> %a1, <8
 }
 
 define <4 x double> @test_unpackh_fhadd_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, <4 x double> %a3) {
-; X32-LABEL: test_unpackh_fhadd_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhaddpd %ymm3, %ymm1, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_fhadd_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhaddpd %ymm3, %ymm1, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_fhadd_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhaddpd %ymm3, %ymm1, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %a0, <4 x double> %a1)
   %2 = call <4 x double> @llvm.x86.avx.hadd.pd.256(<4 x double> %a2, <4 x double> %a3)
   %3 = shufflevector <4 x double> %1, <4 x double> %2, <4 x i32> <i32 1, i32 5, i32 3, i32 7>
@@ -235,15 +165,10 @@ define <4 x double> @test_unpackh_fhadd_256(<4 x double> %a0, <4 x double> %a1,
 }
 
 define <4 x double> @test_unpackl_fhsub_256(<4 x double> %a0, <4 x double> %a1, <4 x double> %a2, <4 x double> %a3) {
-; X32-LABEL: test_unpackl_fhsub_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhsubpd %ymm2, %ymm0, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_fhsub_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhsubpd %ymm2, %ymm0, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_fhsub_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhsubpd %ymm2, %ymm0, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %a0, <4 x double> %a1)
   %2 = call <4 x double> @llvm.x86.avx.hsub.pd.256(<4 x double> %a2, <4 x double> %a3)
   %3 = shufflevector <4 x double> %1, <4 x double> %2, <4 x i32> <i32 0, i32 4, i32 2, i32 6>
@@ -251,15 +176,10 @@ define <4 x double> @test_unpackl_fhsub_256(<4 x double> %a0, <4 x double> %a1,
 }
 
 define <8 x float> @test_unpackh_fhsub_256(<8 x float> %a0, <8 x float> %a1, <8 x float> %a2, <8 x float> %a3) {
-; X32-LABEL: test_unpackh_fhsub_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vhsubps %ymm3, %ymm1, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_fhsub_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vhsubps %ymm3, %ymm1, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_fhsub_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vhsubps %ymm3, %ymm1, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float> %a0, <8 x float> %a1)
   %2 = call <8 x float> @llvm.x86.avx.hsub.ps.256(<8 x float> %a2, <8 x float> %a3)
   %3 = shufflevector <8 x float> %1, <8 x float> %2, <8 x i32> <i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15>
@@ -267,15 +187,10 @@ define <8 x float> @test_unpackh_fhsub_256(<8 x float> %a0, <8 x float> %a1, <8
 }
 
 define <16 x i16> @test_unpackl_hadd_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2, <16 x i16> %a3) {
-; X32-LABEL: test_unpackl_hadd_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphaddw %ymm2, %ymm0, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_hadd_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphaddw %ymm2, %ymm0, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_hadd_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphaddw %ymm2, %ymm0, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16> %a0, <16 x i16> %a1)
   %2 = call <16 x i16> @llvm.x86.avx2.phadd.w(<16 x i16> %a2, <16 x i16> %a3)
   %3 = shufflevector <16 x i16> %1, <16 x i16> %2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27>
@@ -283,15 +198,10 @@ define <16 x i16> @test_unpackl_hadd_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i
 }
 
 define <8 x i32> @test_unpackh_hadd_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i32> %a2, <8 x i32> %a3) {
-; X32-LABEL: test_unpackh_hadd_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphaddd %ymm3, %ymm1, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_hadd_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphaddd %ymm3, %ymm1, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_hadd_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphaddd %ymm3, %ymm1, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %a0, <8 x i32> %a1)
   %2 = call <8 x i32> @llvm.x86.avx2.phadd.d(<8 x i32> %a2, <8 x i32> %a3)
   %3 = shufflevector <8 x i32> %1, <8 x i32> %2, <8 x i32> <i32 2, i32 3, i32 10, i32 11, i32 6, i32 7, i32 14, i32 15>
@@ -299,15 +209,10 @@ define <8 x i32> @test_unpackh_hadd_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i32>
 }
 
 define <8 x i32> @test_unpackl_hsub_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i32> %a2, <8 x i32> %a3) {
-; X32-LABEL: test_unpackl_hsub_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphsubd %ymm2, %ymm0, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_hsub_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphsubd %ymm2, %ymm0, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_hsub_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphsubd %ymm2, %ymm0, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %a0, <8 x i32> %a1)
   %2 = call <8 x i32> @llvm.x86.avx2.phsub.d(<8 x i32> %a2, <8 x i32> %a3)
   %3 = shufflevector <8 x i32> %1, <8 x i32> %2, <8 x i32> <i32 0, i32 1, i32 8, i32 9, i32 4, i32 5, i32 12, i32 13>
@@ -315,15 +220,10 @@ define <8 x i32> @test_unpackl_hsub_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i32>
 }
 
 define <16 x i16> @test_unpackh_hsub_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2, <16 x i16> %a3) {
-; X32-LABEL: test_unpackh_hsub_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vphsubw %ymm3, %ymm1, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_hsub_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vphsubw %ymm3, %ymm1, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_hsub_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vphsubw %ymm3, %ymm1, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16> %a0, <16 x i16> %a1)
   %2 = call <16 x i16> @llvm.x86.avx2.phsub.w(<16 x i16> %a2, <16 x i16> %a3)
   %3 = shufflevector <16 x i16> %1, <16 x i16> %2, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31>
@@ -331,15 +231,10 @@ define <16 x i16> @test_unpackh_hsub_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i
 }
 
 define <32 x i8> @test_unpackl_packss_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2, <16 x i16> %a3) {
-; X32-LABEL: test_unpackl_packss_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpacksswb %ymm2, %ymm0, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_packss_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpacksswb %ymm2, %ymm0, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_packss_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpacksswb %ymm2, %ymm0, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1)
   %2 = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a2, <16 x i16> %a3)
   %3 = shufflevector <32 x i8> %1, <32 x i8> %2, <32 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 32, i32 33, i32 34, i32 35, i32 36, i32 37, i32 38, i32 39, i32 16, i32 17, i32 18, i32 19, i32 20, i32 21, i32 22, i32 23, i32 48, i32 49, i32 50, i32 51, i32 52, i32 53, i32 54, i32 55>
@@ -347,15 +242,10 @@ define <32 x i8> @test_unpackl_packss_256(<16 x i16> %a0, <16 x i16> %a1, <16 x
 }
 
 define <16 x i16> @test_unpackh_packss_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i32> %a2, <8 x i32> %a3) {
-; X32-LABEL: test_unpackh_packss_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpackssdw %ymm3, %ymm1, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_packss_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpackssdw %ymm3, %ymm1, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_packss_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpackssdw %ymm3, %ymm1, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a0, <8 x i32> %a1)
   %2 = call <16 x i16> @llvm.x86.avx2.packssdw(<8 x i32> %a2, <8 x i32> %a3)
   %3 = shufflevector <16 x i16> %1, <16 x i16> %2, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31>
@@ -363,15 +253,10 @@ define <16 x i16> @test_unpackh_packss_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i3
 }
 
 define <16 x i16> @test_unpackl_packus_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i32> %a2, <8 x i32> %a3) {
-; X32-LABEL: test_unpackl_packus_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpackusdw %ymm2, %ymm0, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackl_packus_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpackusdw %ymm2, %ymm0, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackl_packus_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpackusdw %ymm2, %ymm0, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %a0, <8 x i32> %a1)
   %2 = call <16 x i16> @llvm.x86.avx2.packusdw(<8 x i32> %a2, <8 x i32> %a3)
   %3 = shufflevector <16 x i16> %1, <16 x i16> %2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27>
@@ -379,15 +264,10 @@ define <16 x i16> @test_unpackl_packus_256(<8 x i32> %a0, <8 x i32> %a1, <8 x i3
 }
 
 define <32 x i8> @test_unpackh_packus_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %a2, <16 x i16> %a3) {
-; X32-LABEL: test_unpackh_packus_256:
-; X32:       ## %bb.0:
-; X32-NEXT:    vpacksswb %ymm3, %ymm1, %ymm0
-; X32-NEXT:    retl
-;
-; X64-LABEL: test_unpackh_packus_256:
-; X64:       ## %bb.0:
-; X64-NEXT:    vpacksswb %ymm3, %ymm1, %ymm0
-; X64-NEXT:    retq
+; CHECK-LABEL: test_unpackh_packus_256:
+; CHECK:       ## %bb.0:
+; CHECK-NEXT:    vpacksswb %ymm3, %ymm1, %ymm0
+; CHECK-NEXT:    ret{{[l|q]}}
   %1 = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a0, <16 x i16> %a1)
   %2 = call <32 x i8> @llvm.x86.avx2.packsswb(<16 x i16> %a2, <16 x i16> %a3)
   %3 = shufflevector <32 x i8> %1, <32 x i8> %2, <32 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 40, i32 41, i32 42, i32 43, i32 44, i32 45, i32 46, i32 47, i32 24, i32 25, i32 26, i32 27, i32 28, i32 29, i32 30, i32 31, i32 56, i32 57, i32 58, i32 59, i32 60, i32 61, i32 62, i32 63>


        


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