[PATCH] D102111: [AMDGPU] Update SCC defs to VCC when uses are changed to VCC
Brendon Cahoon via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat May 8 10:50:42 PDT 2021
bcahoon created this revision.
bcahoon added a reviewer: arsenm.
Herald added subscribers: kerbowa, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, jvesely, kzhuravl.
bcahoon requested review of this revision.
Herald added subscribers: llvm-commits, wdng.
Herald added a project: LLVM.
The FixSGPRCopies pass converts instructions to VALU when
removing illegal VGPR to SGPR copies. Instructions that use SCC
are changed to use VCC instead. When that happens, the pass must
also change instructions that define SCC to VCC.
The pass was not changing the SCC definition when an ADDC is
converted due to a input that is a VGPR to SGPR copy. But, the
initial ADD instruction, which define SCC, is not converted.
This causes a compilation failure due to a use of an undefined
physical register.
This patch adds code that inserts the SCC definition in the
MoveToVALU worklist when a SCC use is converted to a VCC use.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D102111
Files:
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
llvm/lib/Target/AMDGPU/SIInstrInfo.h
llvm/test/CodeGen/AMDGPU/amdgpu-codegenprepare-idiv.ll
llvm/test/CodeGen/AMDGPU/change-scc-to-vcc.mir
llvm/test/CodeGen/AMDGPU/sdiv64.ll
llvm/test/CodeGen/AMDGPU/srem64.ll
llvm/test/CodeGen/AMDGPU/udiv64.ll
llvm/test/CodeGen/AMDGPU/urem64.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D102111.343854.patch
Type: text/x-patch
Size: 34962 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210508/d5878dd8/attachment.bin>
More information about the llvm-commits
mailing list