[PATCH] D101932: [GlobalISel] Don't form zero/sign extending loads for atomics

[Amara Emerson via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG808bc11d9e1a: [GlobalISel] Don't form zero/sign extending loads for atomics. (authored by aemerson).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D101932/new/

https://reviews.llvm.org/D101932

Files:
  llvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-extending-loads.mir

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D101932.343786.patch
Type: text/x-patch
Size: 21488 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210508/81031673/attachment.bin>