[llvm] 1312852 - [AArch64][GlobalISel] Legalize narrow type G_CTPOPs
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Fri May 7 14:52:44 PDT 2021
Author: Jessica Paquette
Date: 2021-05-07T14:52:23-07:00
New Revision: 1312852040b3190a6cb7d7c1f61fe95a5e930d8d
URL: https://github.com/llvm/llvm-project/commit/1312852040b3190a6cb7d7c1f61fe95a5e930d8d
DIFF: https://github.com/llvm/llvm-project/commit/1312852040b3190a6cb7d7c1f61fe95a5e930d8d.diff
LOG: [AArch64][GlobalISel] Legalize narrow type G_CTPOPs
Using `clampScalar` here because we ought to mark s128 as custom eventually.
(Right now, it will just fall back.)
With this legalization, we get the same code as SDAG:
https://godbolt.org/z/TneoPKrKG
Differential Revision: https://reviews.llvm.org/D100908
Added:
Modified:
llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
index ea690d8020482..d6cc93fa9d3a2 100644
--- a/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
+++ b/llvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
@@ -717,11 +717,14 @@ AArch64LegalizerInfo::AArch64LegalizerInfo(const AArch64Subtarget &ST)
getActionDefinitionsBuilder({G_SBFX, G_UBFX})
.customFor({{s32, s32}, {s64, s64}});
- // TODO: s8, s16, s128
+ // TODO: Custom legalization for s128
// TODO: v2s64, v2s32, v4s32, v4s16, v8s16
// TODO: Use generic lowering when custom lowering is not possible.
getActionDefinitionsBuilder(G_CTPOP)
.legalFor({{v8s8, v8s8}, {v16s8, v16s8}})
+ .clampScalar(0, s32, s128)
+ .widenScalarToNextPow2(0)
+ .scalarSameSizeAs(1, 0)
.customFor({{s32, s32}, {s64, s64}});
computeTables();
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
index 9cd631819d4bb..d846f2d47eae2 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-ctpop.mir
@@ -77,3 +77,114 @@ body: |
%ctpop:_(s64) = G_CTPOP %copy(s64)
$x0 = COPY %ctpop(s64)
RET_ReallyLR implicit $x0
+
+...
+---
+name: widen_s16
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $w0
+
+ ; CHECK-LABEL: name: widen_s16
+ ; CHECK: liveins: $w0
+ ; CHECK: %copy:_(s32) = COPY $w0
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 65535
+ ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT %copy(s32)
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
+ ; CHECK: [[BITCAST:%[0-9]+]]:_(<8 x s8>) = G_BITCAST [[AND]](s64)
+ ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>)
+ ; CHECK: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.aarch64.neon.uaddlv), [[CTPOP]](<8 x s8>)
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[INT]](s32)
+ ; CHECK: %ext:_(s32) = COPY [[COPY]](s32)
+ ; CHECK: $w0 = COPY %ext(s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ %copy:_(s32) = COPY $w0
+ %trunc:_(s16) = G_TRUNC %copy(s32)
+ %ctpop:_(s16) = G_CTPOP %trunc(s16)
+ %ext:_(s32) = G_ANYEXT %ctpop(s16)
+ $w0 = COPY %ext(s32)
+ RET_ReallyLR implicit $w0
+
+...
+---
+name: widen_s8
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $w0
+
+ ; CHECK-LABEL: name: widen_s8
+ ; CHECK: liveins: $w0
+ ; CHECK: %copy:_(s32) = COPY $w0
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
+ ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT %copy(s32)
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
+ ; CHECK: [[BITCAST:%[0-9]+]]:_(<8 x s8>) = G_BITCAST [[AND]](s64)
+ ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>)
+ ; CHECK: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.aarch64.neon.uaddlv), [[CTPOP]](<8 x s8>)
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[INT]](s32)
+ ; CHECK: %ext:_(s32) = COPY [[COPY]](s32)
+ ; CHECK: $w0 = COPY %ext(s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ %copy:_(s32) = COPY $w0
+ %trunc:_(s8) = G_TRUNC %copy(s32)
+ %ctpop:_(s8) = G_CTPOP %trunc(s8)
+ %ext:_(s32) = G_ANYEXT %ctpop(s8)
+ $w0 = COPY %ext(s32)
+ RET_ReallyLR implicit $w0
+
+...
+---
+name: widen_s3
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $w0
+
+ ; CHECK-LABEL: name: widen_s3
+ ; CHECK: liveins: $w0
+ ; CHECK: %copy:_(s32) = COPY $w0
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 7
+ ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT %copy(s32)
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
+ ; CHECK: [[BITCAST:%[0-9]+]]:_(<8 x s8>) = G_BITCAST [[AND]](s64)
+ ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>)
+ ; CHECK: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.aarch64.neon.uaddlv), [[CTPOP]](<8 x s8>)
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[INT]](s32)
+ ; CHECK: %ext:_(s32) = COPY [[COPY]](s32)
+ ; CHECK: $w0 = COPY %ext(s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ %copy:_(s32) = COPY $w0
+ %trunc:_(s3) = G_TRUNC %copy(s32)
+ %ctpop:_(s3) = G_CTPOP %trunc(s3)
+ %ext:_(s32) = G_ANYEXT %ctpop(s3)
+ $w0 = COPY %ext(s32)
+ RET_ReallyLR implicit $w0
+
+...
+---
+name:
diff erent_sizes
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $w0
+ ; CHECK-LABEL: name:
diff erent_sizes
+ ; CHECK: liveins: $w0
+ ; CHECK: %copy:_(s32) = COPY $w0
+ ; CHECK: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 255
+ ; CHECK: [[ANYEXT:%[0-9]+]]:_(s64) = G_ANYEXT %copy(s32)
+ ; CHECK: [[AND:%[0-9]+]]:_(s64) = G_AND [[ANYEXT]], [[C]]
+ ; CHECK: [[BITCAST:%[0-9]+]]:_(<8 x s8>) = G_BITCAST [[AND]](s64)
+ ; CHECK: [[CTPOP:%[0-9]+]]:_(<8 x s8>) = G_CTPOP [[BITCAST]](<8 x s8>)
+ ; CHECK: [[INT:%[0-9]+]]:_(s32) = G_INTRINSIC intrinsic(@llvm.aarch64.neon.uaddlv), [[CTPOP]](<8 x s8>)
+ ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY [[INT]](s32)
+ ; CHECK: %ext:_(s32) = COPY [[COPY]](s32)
+ ; CHECK: $w0 = COPY %ext(s32)
+ ; CHECK: RET_ReallyLR implicit $w0
+ %copy:_(s32) = COPY $w0
+ %trunc:_(s8) = G_TRUNC %copy(s32)
+ %ctpop:_(s16) = G_CTPOP %trunc(s8)
+ %ext:_(s32) = G_ANYEXT %ctpop(s16)
+ $w0 = COPY %ext(s32)
+ RET_ReallyLR implicit $w0
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
index aa6e81693eeae..c888ac236971d 100644
--- a/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
@@ -553,8 +553,8 @@
# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_CTPOP (opcode {{[0-9]+}}): 2 type indices, 0 imm indices
-# DEBUG-NEXT: .. the first uncovered type index: 2, OK
-# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
+# DEBUG-NEXT: .. type index coverage check SKIPPED: user-defined predicate detected
+# DEBUG-NEXT: .. imm index coverage check SKIPPED: user-defined predicate detected
# DEBUG-NEXT: G_BSWAP (opcode {{[0-9]+}}): 1 type index, 0 imm indices
# DEBUG-NEXT: .. the first uncovered type index: 1, OK
# DEBUG-NEXT: .. the first uncovered imm index: 0, OK
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