[llvm] 3822ac9 - [MCA][RegisterFile] Fix register class check for move elimination (PR50265)

[Roman Lebedev via llvm-commits]

Thank you!

On Fri, May 7, 2021 at 11:30 PM Andrea Di Biagio via llvm-commits
<llvm-commits at lists.llvm.org> wrote:
>
>
> Author: Andrea Di Biagio
> Date: 2021-05-07T21:30:25+01:00
> New Revision: 3822ac909ead8f41ebc81e382bb01908bf04f407
>
> URL: https://github.com/llvm/llvm-project/commit/3822ac909ead8f41ebc81e382bb01908bf04f407
> DIFF: https://github.com/llvm/llvm-project/commit/3822ac909ead8f41ebc81e382bb01908bf04f407.diff
>
> LOG: [MCA][RegisterFile] Fix register class check for move elimination (PR50265)
>
> The register file should always check if the destination register is from a
> register class that allows move elimination.
>
> Before this change, the check on the register class was only performed in a few
> very specific cases. However, it should have always been performed.
> This patch fixes the issue.
>
> Note that none of the upstream scheduling models is currently affected by this
> bug, so there is no test for it. The issue was found by Roman while working on
> the znver3 model. I was able to reproduce the issue locally by tweaking the
> btver2 model. I then verified that this patch fixes the issue.
>
> Added:
>
>
> Modified:
>     llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
>
> Removed:
>
>
>
> ################################################################################
> diff  --git a/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp b/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
> index a48915dbed735..e88ee0f0ff26e 100644
> --- a/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
> +++ b/llvm/lib/MCA/HardwareUnits/RegisterFile.cpp
> @@ -364,6 +364,11 @@ bool RegisterFile::tryEliminateMove(WriteState &WS, ReadState &RS) {
>    if (RegisterFileIndex != RRITo.IndexPlusCost.first)
>      return false;
>
> +  // Early exit if the destination register is from a register class that
> +  // doesn't allow move elimination.
> +  if (!RegisterMappings[RRITo.RenameAs].second.AllowMoveElimination)
> +    return false;
> +
>    // We only allow move elimination for writes that update a full physical
>    // register. On X86, move elimination is possible with 32-bit general purpose
>    // registers because writes to those registers are not partial writes.  If a
> @@ -379,9 +384,6 @@ bool RegisterFile::tryEliminateMove(WriteState &WS, ReadState &RS) {
>    // that allow move elimination, and how those same registers are renamed in
>    // hardware.
>    if (RRITo.RenameAs && RRITo.RenameAs != WS.getRegisterID()) {
> -    // Early exit if the PRF doesn't support move elimination for this register.
> -    if (!RegisterMappings[RRITo.RenameAs].second.AllowMoveElimination)
> -      return false;
>      if (!WS.clearsSuperRegisters())
>        return false;
>    }
>
>
>
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