[PATCH] D101992: AMDGPU/GlobalISel: Use destination register bank in applyMappingLoad

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll:449-452
+; GFX7-UNALIGNED-NEXT:    s_mov_b32 s2, -1
+; GFX7-UNALIGNED-NEXT:    s_mov_b32 s3, 0xf000
+; GFX7-UNALIGNED-NEXT:    buffer_load_dwordx3 v[0:2], off, s[0:3], 0
+; GFX7-UNALIGNED-NEXT:    s_waitcnt vmcnt(0)
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Petar.Avramovic wrote:
> foad wrote:
> > arsenm wrote:
> > > This looks like an accidental bug fix
> > Why is it a bug fix? Isn't it better to use a scalar load when possible, cos it's less memory traffic?
> It is a silent bug, that load was marked as vgpr dest, and then split into two sgpr dest loads (was meant to be one buffer load according to banks assigned before applyMapping)
Scalar loads don't support unaligned access, so this was wrong to be using them


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  https://reviews.llvm.org/D101992/new/

https://reviews.llvm.org/D101992