[PATCH] D102073: [TargetLowering] Legalize "vscale x 1" types in more cases
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 7 07:43:25 PDT 2021
frasercrmck created this revision.
frasercrmck added reviewers: craig.topper, sdesmalen, c-rhodes, efriedma.
Herald added subscribers: luismarques, apazos, sameer.abuasal, s.egerton, Jim, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, rogfer01, edward-jones, zzheng, jrtc27, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
frasercrmck requested review of this revision.
Herald added subscribers: llvm-commits, MaskRay.
Herald added a project: LLVM.
This patch extends the legalization capabilities of `<vscale x 1 x ty>`
types to include integer promotion and vector widening. The cases where
element types require expansion are still left unhandled as an error.
These types are also now better handled by `getVectorTypeBreakdown`,
where what looks like older handling for 1-element fixed-length vector
types was spuriously updated to include scalable types.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D102073
Files:
llvm/lib/CodeGen/TargetLoweringBase.cpp
llvm/test/CodeGen/RISCV/rvv/legalize-scalable-vectortype.ll
Index: llvm/test/CodeGen/RISCV/rvv/legalize-scalable-vectortype.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/RISCV/rvv/legalize-scalable-vectortype.ll
@@ -0,0 +1,27 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s
+; RUN: llc -mtriple=riscv64 -mattr=+experimental-v -verify-machineinstrs < %s | FileCheck %s
+
+define <vscale x 4 x i5> @trunc_nxv4i32_to_nxv4i5(<vscale x 4 x i32> %a) {
+; CHECK-LABEL: trunc_nxv4i32_to_nxv4i5:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16,m1,ta,mu
+; CHECK-NEXT: vnsrl.wi v25, v8, 0
+; CHECK-NEXT: vsetvli a0, zero, e8,mf2,ta,mu
+; CHECK-NEXT: vnsrl.wi v8, v25, 0
+; CHECK-NEXT: ret
+ %v = trunc <vscale x 4 x i32> %a to <vscale x 4 x i5>
+ ret <vscale x 4 x i5> %v
+}
+
+define <vscale x 1 x i5> @trunc_nxv1i32_to_nxv1i5(<vscale x 1 x i32> %a) {
+; CHECK-LABEL: trunc_nxv1i32_to_nxv1i5:
+; CHECK: # %bb.0:
+; CHECK-NEXT: vsetvli a0, zero, e16,mf4,ta,mu
+; CHECK-NEXT: vnsrl.wi v25, v8, 0
+; CHECK-NEXT: vsetvli a0, zero, e8,mf8,ta,mu
+; CHECK-NEXT: vnsrl.wi v8, v25, 0
+; CHECK-NEXT: ret
+ %v = trunc <vscale x 1 x i32> %a to <vscale x 1 x i5>
+ ret <vscale x 1 x i5> %v
+}
Index: llvm/lib/CodeGen/TargetLoweringBase.cpp
===================================================================
--- llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -976,9 +976,6 @@
if (NumElts.isScalar())
return LegalizeKind(TypeScalarizeVector, EltVT);
- if (VT.getVectorElementCount() == ElementCount::getScalable(1))
- report_fatal_error("Cannot legalize this vector");
-
// Try to widen vector elements until the element type is a power of two and
// promote it to a legal type later on, for example:
// <3 x i8> -> <4 x i8> -> <4 x i32>
@@ -996,9 +993,12 @@
// If type is to be expanded, split the vector.
// <4 x i140> -> <2 x i140>
- if (LK.first == TypeExpandInteger)
+ if (LK.first == TypeExpandInteger) {
+ if (VT.getVectorElementCount() == ElementCount::getScalable(1))
+ report_fatal_error("Cannot legalize this scalable vector");
return LegalizeKind(TypeSplitVector,
VT.getHalfNumVectorElementsVT(Context));
+ }
// Promote the integer element types until a legal vector type is found
// or until the element integer type is too big. If a legal type was not
@@ -1057,6 +1057,9 @@
return LegalizeKind(TypeWidenVector, NVT);
}
+ if (VT.getVectorElementCount() == ElementCount::getScalable(1))
+ report_fatal_error("Cannot legalize this vector");
+
// Vectors with illegal element types are expanded.
EVT NVT = EVT::getVectorVT(Context, EltVT,
VT.getVectorElementCount().divideCoefficientBy(2));
@@ -1509,7 +1512,7 @@
// This handles things like <2 x float> -> <4 x float> and
// <4 x i1> -> <4 x i32>.
LegalizeTypeAction TA = getTypeAction(Context, VT);
- if (EltCnt.getKnownMinValue() != 1 &&
+ if ((EltCnt.isScalable() || EltCnt.getFixedValue() != 1) &&
(TA == TypeWidenVector || TA == TypePromoteInteger)) {
EVT RegisterEVT = getTypeToTransformTo(Context, VT);
if (isTypeLegal(RegisterEVT)) {
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