[PATCH] D101292: [AMDGPU] Restrict immediate scratch offsets
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 7 03:06:07 PDT 2021
foad accepted this revision.
foad added a comment.
This revision is now accepted and ready to land.
LGTM, just nits inline.
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Comment at: llvm/lib/Target/AMDGPU/AMDGPU.td:175
+def FeatureNegativeScratchOffsetBug : SubtargetFeature<"negative-scratch-offset-bug",
+ "NegativeScratchOffsetBug",
----------------
Nit: maybe define these next to FlatSegmentOffsetBug since they're closely related?
================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:7373-7374
+// are allowed and some are not.
+// In general, flat instructions can only be unsigned, global and scratch
+// instructions can also be negative.
+//
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Nit: "flat instruction offsets can only be non-negative, global and scratch instruction offsets can ..."
================
Comment at: llvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll:305
; FLATSCR-NEXT: s_waitcnt vmcnt(0)
-; FLATSCR-NEXT: scratch_load_dwordx4 v[4:7], off, s2 offset:-16 glc
+; FLATSCR-NEXT: s_movk_i32 s2, 0x2000
+; FLATSCR-NEXT: scratch_load_dwordx4 v[4:7], off, s2 glc
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Seems a shame that this wasn't CSE'd away.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D101292/new/
https://reviews.llvm.org/D101292
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