[PATCH] D98081: [AMDGPU] Improve Codegen for build_vector

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/AMDGPUInstructions.td:204-205
+
+    return TLI->isCanonicalized(MI.getOperand(0).getReg(), const_cast<MachineFunction&>(MF)) &&
+      TLI->isCanonicalized(MI.getOperand(1).getReg(), const_cast<MachineFunction&>(MF));
+  }];
----------------
In MIR, instructions have dst operands followed by src operands. You probably need to check operand 1 and operand 2 here.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98081/new/

https://reviews.llvm.org/D98081